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IMS 740 Manual page 6

I/o processor board

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Z-80A PIO Definition
PORT A INPUT BITS
AO
A2
DSS-
A3
DLO-
A4
C/D+
A5
IBF+
A6
OBF-
A7
PER+
PORT B OUTPUT BITS
BO
NB1+
Bl
NB2 +
B2
NB4+
B3
NB8+
B4
DPR-
B5
CRQ-
B6
ROMEN +
B7
PERR+
Summary
BELL 801 DATA SET STATUS
BELL 801 DATA LINE OCCUPIED
8255A PCO CONTROL/DATA FLAG
8255A PCS INPUT BUFFER FÜLL
8255A PC7 OUTPUT BUFFER FÜLL
RAM PARITY ERROR
BELL 801
BELL 801
BELL 801
BELL 801
BELL 801
BELL 801
ROM ENABLE
RAM PARITY
NUMBER
NUMBER
NUMBER
NUMBER
BIT 1
BIT 2
BIT 4
BIT 8
DIGIT PRESENT
CALL REQUEST
RESET
NOTE: For more detail regarding the programming of the Z-80A Microcomputer
Components see Zilog Data Book or Technical Manuals.
IMS INTERNATIONAL
D00740 REV 1.0 October 20, 1981 Page 6

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