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8255A Bidirectional Bus I/O Control Signal Definition
INTR+ (Interrupt Request) Used to interrupt the S-100 BUS Master for both input or
output operations.
OBF- (Output buffer Full) Used to indicate that the S-100 BUS has written data out
to PORT A.
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ACK- (Acknowledge) Enables the tri-state output buffer of PORT A.
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-
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INTE1 (The INTE Flip-Flop Associated with OBF) Controlled by bit set/reset of PC6.
STB- (Strobe Input) Used to load data into the input latch of PORT A.
!
IBF + (Input Buffer Full) Indicates that data has been loaded into the input latch of
PORT A.
^
INTE2 (The INTE Flip-Flop Associated with IBF) Controlled by bit set/reset of PC4.
8255A Definition Summary
PAO-PA7 I/O DATA
PBO-PB7 UNUSED
PCO
CONTROL/DATA FLAG
PCI
RESET SLAVE
PC2
UNUSED
PC3
INTR+
PC4
STB-/INTE2
•
PCS
IBF +
PC6
ACK-/INTE1
PC7
OBF-
INTERRÜPT SELECTION OPTION (JF)
JF
VIO
VII
VI2
VI3
VI4
VI5
VI6
VI7
1 .
2 .
3 .
4 .
5 .
6 .
7 .
8 .
. 16
. 15
. 14
. 13
. 12
. 11
. 10
. 9
The installing of a SHUNT will attach the selected VIx Interrupt Level to Parallel
Port A Interrupt (PCS INTR).
Note: For more detail regarding the programming of the 8255A see the Intel
Peripheral Design Handbook.
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IMS INTERNATIONAL
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D00740 REV 1.0 October 20, 1981 Page 3
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