Dell 1907FPf Service Manual page 15

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44
RESERVED
45
RESERVED
46
RESERVED
47
VDD_OUT_33
48
VSS_OUT
49
PBIAS
50
PWM0/GPO_4
51
GPIO_0
52
CRVSS
53
RVDD_33V
54
CRVSS
55
CVDD_18
56
GPIO_1
57
GPIO_2
58
GPIO_3
59
SPI_CSn
60
SPI_CLK
61
SPI_DI
62
SPI_DO
63
RVDD_33V
64
DDC_SCL_VGA
65
DDC_SDA_VGA
66
DDC_SCL_DVI/
HOST_SCA
67
DDC_SDL_DVI/
HOST_SDA
68
AVSS_DVI
69
REXT
70
AVDD_DVI_18
71
AVSS_DVI
72
RX2+
73
RX2-
74
AVDD_DVI_33
75
RX1+
76
RX1-
77
AVSS_DVI
78
AVDD_DVI_18
79
AVSS_DVI
80
RX0+
O
Reserved; Do not connect
O
Reserved; Do not connect
O
Reserved; Do not connect
P
Digital 3.3V supply for LVDS output
G
Digital ground for LVDS output
O
Panel backlight enable
I/O PWM0 output or optional general-purpose output GPO_4.
Also used for bootstrap control
I/O General-purpose output GPO_0. Also used for bootstrap control
G
Chip digital ground
P
Digital Output VDD. Connect to digital 3.3V
G
Chip digital ground
P
Core VDD connect to digital 1.8V
I/O General-purpose output GPO_1. Also used for bootstrap control
I/O General-purpose output GPO_2. Also used for bootstrap control
I/O General-purpose output GPO_3. Also used for bootstrap control
I/O SPI ROM chip select. Also used for bootstrap control.
I/O SPI ROM Clock output.
I/O SPI ROM Data input. Connect this pin to the data output of
Serial FLASH
I/O SPI ROM Data input. Connect this pin to the data input of Serial
FLASH
P
Chip digital ground
I
DDC2Bi clock for Analog Port
I/O DDC2Bi clock for Analog Port, internal pull up of 10K ohms
I
DDC2Bi clock for DVI Port or host I2C clock signal for
debugging
I/O DDC2Bi clock for DVI Port or host I2C data signal for
debugging, internal pull up of 10k ohms
G
Analog GND for DVI input. Reserved for gm2621 and gm2621;
Do not connect
I
External reference resistor.
A 1%, 250? resistor should be connected from this pin to pin 74.
Reserved for gm2621 and gm2621; Do not connect.
P
Analog VDD (1.8V) for DVI input.
Must be bypassed with external capacitor(s) to AVSS_DVI.
Reserved for gm2621 and gm2621; Do not connect.
G
Analog GND for DVI input. Reserved for gm2621 and gm2621;
Do not connect.
I
Do not connect.
I
Do not connect.
P
Analog VDD (3.3V) for DVI input. Reserved for gm2621 and
gm2621; Do not connect.
I
Do not connect.
I
Do not connect.
G
Analog GND for DVI input. Reserved for gm2621 and gm2621;
Do not connect.
P
Analog VDD (1.8V) for DVI input.
Must be bypassed with externa l capacitor(s) to AVSS_DVI.
Reserved for gm2621 and gm2621; Do not connect.
G
Analog GND for DVI input. Reserved for gm2621 and gm2621;
Do not connect.
I
Do not connect.
14
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