Ziatech Corporation ZT 8952 Hardware User Manual
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Ziatech Corporation ZT 8952 Hardware User Manual

Integrated drive electronics (ide) interfaces
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Ziatech Corporation ZT 8952 Hardware User Manual

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  • Page 1 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...
  • Page 2 ZT 8952 ZT 8953 Integrated Drive Electronics (IDE) Interfaces Hardware User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 3: Table Of Contents

    UNPACKING..........................8 SYSTEM REQUIREMENTS ......................8 PHYSICAL REQUIREMENTS..................8 POWER REQUIREMENTS.....................8 INSTALLATION...........................9 16-BIT VS. 8-BIT STD 32 TRANSFERS................9 DISABLING THE ZT 8952 CONTROLLER..............9 INTERRUPT SELECTIONS ....................9 IDE DIAGNOSTIC ......................10 3. OPERATIONAL OVERVIEW ......................12 FREQUENTLY ASKED QUESTIONS..................12 STD BUS COMPATIBILITY.......................16 CPU AND STD BUS INTERFACE .....................16 DATA TRANSFERS......................16...
  • Page 4 Contents ERROR REPORTING .......................40 A. JUMPER CONFIGURATIONS ......................42 JUMPER OPTIONS ........................42 JUMPER DESCRIPTIONS ......................45 W1..........................45 W2..........................46 W3-W7 .........................47 W11-W15 ........................48 W10A, W10B ........................48 W8..........................49 W9..........................49 B. SPECIFICATIONS ..........................50 REQUIREMENTS......................51 STD BUS LOADING CHARACTERISTICS ..............51 MECHANICAL...........................54 CARD DIMENSIONS AND WEIGHT ................54 CONNECTORS ......................54 C.

  • Page 5: Manual Organization

    MANUAL ORGANIZATION This manual describes the operation and use of the ZT 8952/8953. The term ZT 8952 is used throughout the manual to reference both the ZT 8952 and the ZT 8953, except where otherwise noted. Specific differences between the two are explicitly stated. Refer to Appendix B for specifications.

  • Page 6: Introduction

    The ZT 8952 is also available with no drive mounted (ZT 8952-0) for applications that require remote mounting of the drive. Cables are restricted to 18 inches in length from controller to drive. The ZT 8952 will support up to two drives.

  • Page 7: Features

    IDE Hard Disk Either a 2½ inch drive (ZT 8952) or a 3½ inch drive may be mounted directly to the interface to provide a compact, modular unit for STD applications. The drive may also be remotely mounted and cabled.

  • Page 8: Interrupts

    1. Introduction Interrupts The IDE interface normally drives an interrupt to the BIOS for data ready status. This interrupt may be jumpered to either INTRQ*, INTRQ1*, INTRQ2* (CNTRL*), INTRQ3*, or IRQx on the backplane. Alternatively, one of five frontplane interrupts may be selected to provide interrupt support.

  • Page 9: Getting Started

    Use the anti-static bag shipped with the ZT 8952 to handle the board. SYSTEM REQUIREMENTS The ZT 8952 is designed for use in an STD bus application. The board is therefore mechanically and electrically compatible with the STD 32 bus specifications. Physical Requirements ZT 8952 requires between one and three slots depending upon the size drive mounted on the board.

  • Page 10: Installation

    INSTALLATION If the ZT 8952 or ZT 8953 is used as an integrated unit you need only insert it into the card cage. For non-integrated usage the drive needs to be mounted and a cable run between the ZT 8952-0 and the drive.

  • Page 11: Ide Diagnostic

    Not installed: W2, W3, W4, W6, W7, W8, W10B, W11, W12, W13, W14, W15 This configuration does not allow the ZT 8952 to respond to BHE*. Use this configuration when installing this board in non-STD 32 card cages. Some CPU cards drive BHE* (STD-80 MEMEX) in non-standard ways and will cause the board to misalign data.
  • Page 12 STD 32 peripherals are required to meet certain compliance standards. This allows the system integrators to match capabilities among different manufacturers' boards. The ZT 8952 has the following STD 32 compliance: I/O Slave: SA16, SA8 - I, IXL, IXP Definitions: •...

  • Page 13: Operational Overview

    "IDE drive", as used in this context, is an AT style IDE drive. The IDE interface is a 16-bit interface for the IBM AT. How does ZT 8952 allow operation within the STD bus and with 8-bit CPUs? ZT 8952 uses control logic to convert from the STD bus to the IDE interface.
  • Page 14 16-bit transfers allow backplane transfers of up to 4 Mbytes/second. Only 8-bit transfers are performed within older STD-80 series backplanes, or with 8-bit processors. Can I use ZT 8952 with a CPU such as ZT 8910, which has a built in IDE controller? Yes.
  • Page 15 Please call Ziatech if you need specifications for a particular drive. Should I FDISK and FORMAT the disk when I receive the ZT 8952 as an integrated unit? All drives are already FDISKed and FORMATted when you receive them. If bought as a system component the drive has been tested at the system level.
  • Page 16 Disk Controller. Why? Since the ZT 8952 and ZT 8950 share I/O register 3F7h, the ZT 8950 was revised to A.2 to allow correct operation with the ZT 8952. Be sure your ZT 8950 is Revision A.2 or greater. I recently received revision 0.2 boards with a new jumper that was not present on revision 0 or 0.1 boards.

  • Page 17: Std Bus Compatibility

    STD-80 signal called MEMEX that was not clearly defined. Some processors either drive this signal low or allow it to be driven via a parallel port bit. Since ZT 8952 interprets this signal for data size, an 8-bit transfer would be misinterpreted as a 16-bit transfer should BHE* be driven low.

  • Page 18: I/O

    3. Operational Overview The ZT 8952 decodes two address ranges within the I/O map. The primary address range used is 1F0h-1F7h and the secondary is 3F6h-3F7h. Note that use with the ZT 8950 Floppy Disk Controller requires that the ZT 8950 be Revision A.2 or greater.

  • Page 19: Interrupts

    3. Operational Overview INTERRUPTS ZT 8952 can drive one of four backplane interrupts or one of five frontplane interrupts with the IDE interrupt. Any systems shipped that require interrupt usage will contain the appropriate interrupt jumper loaded by the system integrator. The "Interrupt Structure"...

  • Page 20: Ide Registers

    3. Operational Overview IDE REGISTERS The IDE Interface is composed of 10 register locations. Eight of these are decoded at 1F0h-1F7h, with the remaining two at 3F6h and 3F7h. The "I/O Register Addresses and Functions" table below defines all of the register addresses and functions for these I/O locations.

  • Page 21: Ide Interface

    All data transferred between the hard disk and the host CPU passes through the data register. The host CPU passes sector table information during execution of the FORMAT command. ZT 8952's control circuitry dynamically packs and unpacks 16-bit data for 8-bit processors. In 16-bit systems, full 16-bit transfers are performed.

  • Page 22: Write Precompensation Register

    4. IDE Interface BBK—Bad Block Indicates a bad block mark was detected in the sector's ID field. UNC—Uncorrectable Data Error Indicates an uncorrectable data error has been encountered. IDNF—ID Field Not Found Indicates the requested sector's ID field was not found. ABRT—Aborted Command Indicates the requested command has been aborted due to a drive status error such as Not Ready or Write Fault, or because the command code was invalid.

  • Page 23: Sector Number Register

    4. IDE Interface Sector Number Register (1F3h, Read/Write - 8 bits) This register contains the starting sector number for any disk access. The sector number is a value between 1 and the maximum number of sectors per track. At the completion of each sector, and at the end of the command, this register is updated to reflect the last sector read correctly, or the sector on which the error occurred.

  • Page 24: Drive/Head Register

    4. IDE Interface Drive/Head Register (1F6h, Read/Write - 8 bits) The drive/head register, also called the SDH register, contains the drive ID number and its head numbers. The host defines the contents of the drive/head register by executing the Initialize Drive Parameters command. At the completion of each sector and at the end of the command this register is updated to reflect the currently selected head.

  • Page 25: Status Register

    4. IDE Interface Status Register (1F7h, Read - 8 bits) This register contains the drive/controller status. The contents of this register are updated at the completion of each command. If the BSY bit is active no other bits are valid. When the BSY bit is not set (logical 0) the remaining bits in the status register are valid.

  • Page 26: Command Register

    4. IDE Interface DRDY—Drive Ready DRDY indicates that the drive is ready to accept a command. When an error occurs this bit remains unchanged until the host reads the status register, then again indicates that the drive is ready. At power-on this bit should be cleared until the drive is up to speed and ready to accept a command.
  • Page 27 4. IDE Interface command is executed as soon as received from the host. Each command may need additional programming of the sector count, sector number, cylinder, and/or drive/head register(s). Command codes and parameters are shown in the following Table, "Command Codes and Parameters". See Chapter 5, "IDE Command Descriptions,"...

  • Page 28: Alternate Status Register

    4. IDE Interface Alternate Status Register (3F6h, Read - 8 bits) The alternate status register contains the same information as does the status register at 1F7h. The only difference is that reading this register does not clear the interrupt, which implies interrupt acknowledgment of the interrupt source. All bit definitions are the same.

  • Page 29: Drive Address Register

    This bit is reserved for floppy disk drive subsystem usage. In the original AT implementation the hard disk and floppy disk systems shared this register location. The ZT 8952 does not drive this bit on the STD bus in order to avoid contention should a floppy disk controller be in the system.
  • Page 30 4. IDE Interface DS1 - DS0—Drive Select These bits represent the drive currently selected. A logical 0 indicates the respective drive is selected. For example, if drive 0 is selected, then DS0 will be logical 0 (active) and DS1 will be logical 1 (inactive).   Artisan Technology Group - Quality Instrumentation ...

  • Page 31: Ide Command Descriptions

    5. IDE COMMAND DESCRIPTIONS This chapter describes various commands that can be performed via the IDE command block. These commands are performed by writing to register 1F7h. The core commands common to all drives are presented here. Contact Ziatech for drive-specific support. CORE COMMANDS All commands are decoded from the command register.
  • Page 32 5. IDE Command Descriptions Read Sector(s) (2xh) This command reads from 1 to 256 sectors as specified in the command block, beginning at the specified sector (sector count equal to zero requests 256 sectors). When the command register is written, the drive sets the BSY bit and begins execution of the command.
  • Page 33 5. IDE Command Descriptions If the drive is not on the desired track, an implied seek is performed. Once on the desired track, the drive searches for the appropriate ID field. If the ID is read correctly, data loaded in the buffer, followed by the ECC bytes, is written to the sector's data field. Upon command completion, the command block registers contain the cylinder, head, and sector number of the last sector read.
  • Page 34 5. IDE Command Descriptions Seek (7xh) This command initiates a seek and selects the head specified in the command block. The drive need not be formatted for a seek command to execute properly. When the command is issued, the drive sets BSY in the status register, initiates the seek, resets BSY, and generates an interrupt.
  • Page 35 5. IDE Command Descriptions Initialize Drive Parameters (91h) This command enables the host to set the head switch and cylinder increment points for multiple sector operations. The drive activates translate mode only if the sector count register contains the value 17 at the issuance of this command. In the translate mode the logical head, sector numbers, and cylinder number in the command block are translated to their native physical values as part of the command's execution.
  • Page 36 5. IDE Command Descriptions transfer is required only at the start of the block instead of on each sector. There is no interrupt request prior to the first block transfer. The block count, which is the number of sectors to be transferred as a block, is programmed by the set multiple mode command, which must be executed prior to the write multiple command.
  • Page 37 5. IDE Command Descriptions Write Buffer (E8h) The write buffer command allows the host to overwrite the contents of the drive's sector buffer with any data pattern desired. Only the command register is valid for this command. When this command is issued the drive will set BSY, set up the sector buffer for a write operation, set DRQ, reset BSY, and generate an interrupt.
  • Page 38 5. IDE Command Descriptions Word Parameters Word 00 Drive dependent Word 01 Number of fixed cylinders Word 02 Number of removable cylinders Word 03 Number of heads Word 04 Number of unformatted bytes/physical track Word 05 Number of unformatted bytes/sector Word 06 Number of physical sectors/track Word 07...

  • Page 39: Operations Description

    5. IDE Command Descriptions OPERATIONS DESCRIPTION The following pages describe operations that span several of the commands covered in the preceding section. Reset A reset condition will set the drive busy, allowing the drive to perform the proper initialization required for normal operation. A reset condition can be generated in four ways.

  • Page 40: Data Retry Algorithm

    5. IDE Command Descriptions When a write type command is issued, the IO16 Enable and Data Request are set. After the data to be written is put into the RAM buffer the BSY flip-flop is set. This can be done only when the buffer is full in write mode and it is not the last transfer. Write type commands include Write Sector(s), Format, and Write Sector Buffer.

  • Page 41: Header Retry Algorithm

    5. IDE Command Descriptions error condition to the host. With the exception of disabling retries (retry count = 0), the retry count of 128 is currently not changeable. When the read/write heads are switched or a seek is completed the drive will attempt an offtrack read when less than 200 µinches from the center of the track.
  • Page 42 5. IDE Command Descriptions Error Reporting Matrix IDNF ABRT DRDY CORR Recalibrate Read Sector Read Long Write Sector Write Long Read Verify Format Track Seek Execute Drive Diagnostics Initiator Drive Parameters Read Multiple Write Multiple Set Multiple Read Buffer Write Buffer Identify Drive Cache On/Off The following errors are valid upon issuing an invalid command code:...

  • Page 43: Jumper Configurations

    A. JUMPER CONFIGURATIONS JUMPER OPTIONS The ZT 8952 includes several jumper options that tailor the board's operation to the requirements of specific applications. Jumpers having only two jumper posts are labeled Wx, where x defines the jumper number. Jumpers having three jumper posts are labeled Wx "a"...
  • Page 44 A. Jumper Configurations Default jumper configurations for the ZT 8952 board are illustrated in the figure below, "Default Jumper Locations". The following figure, "Customer Jumper Locations", is used to document customer-specific configurations. Note: W2 in for 16-bit transfers only. Default Jumper Locations   Artisan Technology Group - Quality Instrumentation ...
  • Page 45 A. Jumper Configurations Customer Jumper Locations   Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 46: Jumper Descriptions

    A. Jumper Configurations The table below, "Jumper Cross Reference", divides the jumpers into functional groups and lists page numbers where a description of the jumpers can be found. These descriptions are presented in numerical order following the table. Standard default †...
  • Page 47 A. Jumper Configurations Selects whether the control logic uses BHE*. Installed, BHE* selects the high byte of a 16-bit transfer to or from register 1F0h. See below figure "8-Bit/16-Bit Transfer Jumper". Factory default is installed. Install W2 in systems with ZT 8911, ZT 8902, ZT 8901, and STD 32 CPUs performing 16-bit transfers.

  • Page 48: W3-W7

    A. Jumper Configurations W3-W7 Selects which frontplane interrupt to drive. The BIOS does not use interrupts for hard disk transfers. See the figure "Interrupt Structure" below for details. Factory default is W5 installed. JUMPER IN FUNCTION FP7* enabled FP6* enabled †...

  • Page 49: W11-W15

    A. Jumper Configurations W11-W15 Selects which backplane interrupt to drive the IDE interrupt status. The default is to drive no backplane interrupt. Factory Default is none installed. JUMPER IN FUNCTION IRQx enabled (STD 32 slot-specific interrupt) INTRQ1* enabled INTRQ* enabled INTRQ2* enabled INTRQ3* enabled (STD 32 only) Note:...
  • Page 50 Enables or disables control logic. Removing this jumper lets a drive be powered by the ZT 8952 but controlled via an external IDE interface. Removing the jumper does not let the board drive the backplane with data during backplane reads to I/O space normally decoded by the ZT 8952.

  • Page 51: Specifications

    The ZT 8952-0 (non-integrated controller) is also represented. The electrical and environmental specifications of the integrated drives are greatly affected by requirements of the drive itself. This is seen when the base ZT 8952-0 is compared to integrated versions. All data is current and will be updated when appropriate. Contact Ziatech for further details on individual drives.

  • Page 52: Requirements

    Current, environmental, and mechanical specifications are presented in the table below. Current, Environmental, and Mechanical Requirements CURRENT RE- MECHANICAL ENVIRONMENTAL REQUIREMENTS QUIREMENTS AT SPECIFICATIONS PRODUCT ZT 8952-0 320 470 -40 to +85 0 to +65 5 to 95 † ZT 8952-40 0.7 .75 0.5 100...
  • Page 53 B. Specifications STD Bus Signal Loading, P Connector PIN (CIRCUIT SIDE) PIN (COMPONENT SIDE) OUTPUT DRIVE OUTPUT DRIVE INPUT LOAD INPUT LOAD MNEMONIC MNEMONIC RSVD XA23 XA19 XA22 XA18 XA21 XA17 XA20 XA16 RSVD NOWS* +5 VDC +5 VDC DREQX* DAKx* MASTER16* AENx*...
  • Page 54 B. Specifications STD Bus Signal Loading, E Connector PIN (CIRCUIT SIDE) PIN (COMPONENT SIDE) OUTPUT DRIVE OUTPUT DRIVE INPUT LOAD INPUT LOAD MNEMONIC MNEMONIC LOCK* XA23 XA19 XA22 XA18 XA21 XA17 XA20 XA16 RSVD NOWS* +5 VDC +5 VDC DREQX* DAKx* MASTER16* AENx*...

  • Page 55: Mechanical

    ZT 8952 meets the STD 32 bus specification for all mechanical parameters. In a card cage with 0.625 inch spacing the ZT 8952 requires one card slot as a stand-alone card. As an integrated hard disk controller it requires up to 4 slots. Configurations and card slot requirements are shown in "Current, Environmental, and Mechanical...
  • Page 56 The backplane interface comprises two sets of finger patterns interlaced so that the ZT 8952 interfaces to both STD-80 and STD 32 buses. The "P" fingers are the original STD-80 signals. The additional STD 32 signals are designated "E" fingers and interlace with the "P"...
  • Page 57 2 mm header style connector for ribbon cable interfacing or a right angle receptacle for direct mounting of the hard disk to the ZT 8952. J2 is composed of 44 signals, four being added to power the 2½ inch disk drive directly. The 40 signals remaining are in common with those of J1, and comprise the control interface for the IDE interface.
  • Page 58 B. Specifications J1 and J2 Pin Assignments Pin Number Signal Pin Number Signal -Host Reset +Host Data 7 +Host Data 8 +Host Data 6 +Host Data 9 +Host Data 5 +Host Data 10 +Host Data 4 +Host Data 11 +Host Data 3 +Host Data 12 +Host Data 2 +Host Data 13...
  • Page 59 B. Specifications Assembly Diagram   Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 60: Glossary

    C. GLOSSARY This appendix lists the command codes and defines important terms and acronyms used in this manual. COMMAND CODES Command Codes and Parameters COMMAND PARAMETERS NAME CODE EXECUTIVE DRIVE DIAGNOSTIC FORMAT TRACK IDENTIFY DRIVE INITIALIZE DRIVE PARAMETERS READ BUFFER READ MULTIPLE READ SECTORS, with retry READ SECTORS, no retry...

  • Page 61: Terminology

    There are many types of IDE drives. The generally accepted reference is to a PC-AT compatible controller that is embedded. The ZT 8952 uses a PC-AT IDE type disk drive. INTRQ* Interrupt request. Processor card input signals that conditionally interrupt the program when enabled by a specific program instruction.
  • Page 62 C. Glossary register A memory location for operating parameters. STD-80 8-bit transfer capability. SA8 is used within STD 32 to define transfer types. SA16 16-bit transfer using STD-80 control signals. Used to define STD 32 transfer type. STD bus The collection of signals defined on P connector to support 8-bit transfers between masters and slaves.

  • Page 63: Customer Support

    D. CUSTOMER SUPPORT This appendix offers technical and sales assistance information for this product, warranty information, and necessary information for the return of a Ziatech product. TECHNICAL/SALES ASSISTANCE If you have a technical question, please call Ziatech's Customer Support Service at the number below, or e-mail our technical support team at tech_support@ziatech.com.

  • Page 64: Ziatech Warranty

    Warranty information for Ziatech products is available at Ziatech’s website, located at http://www.ziatech.com. TRADEMARKS STD 32 and STD 32 STAR SYSTEM are trademarks of Ziatech Corporation IBM PC/XT/AT are registered trademarks of International Business Machines, Inc. All other brand or product names may be trademarks or registered trademarks of their respective holders.
  • Page 65 1050 Southwood Drive San Luis Obispo, CA 93401 USA Tel: (805) 541-0488 FAX: (805) 541-5088 E-Mail: tech_support@ziatech.com Internet: http://www.ziatech.com Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 66 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...

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