Sony CDX-605 Primary Service Manual page 5

CDX-605
• IC Block Diagrams
IC11 CXA1992BR (RF BOARD)
39 38 37 36
VEE
PD2 IV PD1 IV
AMP AMP
FE_BIAS 40
VCC
APC
VEE
F
41 –
LASER POWER CONTROL
+
F IV AMP
VCC FE AMP
E 42 –
+
E IV AMP
EI 43
VEE
44
VEE
VEE
+
–
TEO 45 +
TRK. GAIN
–
WINDOW COMP.
+ +
– –
E-F BALANCE
LPFI 46 WINDOW COMP.
+
+
–
–
TEI 47
–
+
ATSC 48
–
+
ATSC
WINDOW
COMP.
TZC 49 –
+
DFCT
TZC COMP.
TM1
TDFCT 50
VCC
TG1
+
VC 51
–
VEE
VCC
FOCUS
PHASE COMPENSATION
FZC 52 +
–
DFCT
FZC COMP.
FS4
1 2 3 4
35 34 33 32 31 30
–
+
RF SUMMING
AMP
+
–
+
–
VCC
VCC
VEE
+
–
DFCT
+
VEE
–
LEVEL S
VEE
FO. BIAS
WINDOW
VCC
IIL
MIRR
COMP.
TTL
FOK
FOH
FOL
TGH
IIL DATA REGISTER
TGL
INPUT SHIFT REGISTER
BALH
ADDRESS DECODER
BALL
SENS SELECTOR
ATSC
OUTPUT DECODER
TZC
FZC
DFCTO IFB1-6 FS1-4 TG1-2 TM1-7
BAL1-4
TOG1-4
TRACKING
PHASE COMPENSATION
VCC
TM7
FS1
FS2
+
Charge
–
up
TG2
VEE
5 6 7 8 9 10
– 31 –
IC52 BA6287F (RF BOARD)
IC301 BA6287F (MAIN BOARD)
OUT1 1
29 28 27
VM 2
26 SENS2
VCC 3
IIL
SENS1
25
TTL
24 C. OUT
FIN 4
23 XRST
22 DATA
IC101 CXD2530Q (MAIN BOARD)
TTL
21 XLT
IIL
20 CLK
NC 81
VSS 82
19 LOCK
VDD 83
NC 84
TES7 85
NC 86
VCC 18 VCC VSS 87
XVDD 88
XTAI 89
XTAO
90
PS1-4
XVSS 91
ISET 17 ISET
VSS 92
NC 93
TES8
94
VCC VCC
NC 95
16 SL_O
VDD 96
TM4 TM6 VSS 97
NC 98
NC
99
15 SL_M XRST 100
TM5
TM3
–
SL_P
14
+
VEE VEE
TM2
FSET
11 12 13
8 GND
7 OUT2
DRIVER DRIVER
TSD
6 VREF
CONTROL LOGIC
POWER
SAVE
5 RIN
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
ERROR
CORRECTOR
D / A
EFM
INTERFACE
DEMODULATOR
DIGITAL OUT
16K RAM
SUB CODE
PROCESSOR
TIMING
SERVO
LOGIC CPU
AUTO
INTERFACE
DIGITAL CLV
SEQUENCER
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
– 32 –
50 LRCK
49 WDCK
48 ASYE
47
ASYO
ASYMMETRY
46 ASYI
CORRECTOR
45 BIAS
44 RF
AVDD
43
42
CLTV
DIGITAL
AVSS
41
PLL
40 FILI
39 FILO
PCO
38
VCTL
37
OSC
36 V16M
35 VCKI
CLOCK
34 VPCO1
GENERATOR
33 VPCO2
32 TES1
31 TES0