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Alpha Micro Manuals
Computer Hardware
AM-100
Technical manual
Alpha Micro AM-100 Technical Manual
2-board 16-bit cpu
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Contents
Table of Contents
Troubleshooting
Bookmarks
Table of Contents
Table of Contents
Header Jumper Wiring
5-100 Bus DMA Timing
Sequencer Flow Diagram
Sequencer Logic Equations
CPU Read Byte Timing
CPU Write Byte Timing
CPU Write Word Timing
CPU Read-Modify-Write Byte Timing
CPU Read-Modify-Write Word Timing
CPU Chip Set
Register File
Programmable Translation Array (PTA)
Data Paths
Programmable Translation Array Conponents
Programmable Translation Array Operations
Microinstructions
Microinstruction Bus Operation
Bus Operation
Microinstruction Bus Element Description
Data Chip
Control Chip
Microinstruction ROM
Data Access
Microinstruction Bus Timing
Input/Output Instructions
Data/Address Lines
Control Lines
Interrupt, Reset, and Compute
Input/Output Operations
Circuit Module Description
Tri-State 4-Bit D Type Register
High-Speed Hex Inverter (Board 1, U7)
Tri-State Buffers (Board 1, U5, U8, U22, U24, U26; Board 2, U45, U46, U48)
Hex Tri-State Buffers (Board 2, U1L, U47)
Eight-Line to Three-Line Encoder (Board 2, U29, U30)
Data Selector/Multiplexer
U23, U31, U32, U34, U36)
Dual Retriggerable One-Shots with Clear (Board 2, U22)
Dual Voltage Controlled Oscillators (Board 2, US)
Decoder (Board 2, U7, U8, U42)
D Flip-Flops with Clear (Board 1, U13, U14, U25; Board 2, Ulo)
Tri-State Octal Buffers
U19, U27)
Maintenance and Troubleshooting
Introduction
Circuit Board Checkout
Warranty Procedures
Schematic and Parts List
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JAN l' 1979
-
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~~Ipha
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TECHNICAL MANUAL
FOR
AM·" OC
2-BOARD 1 B-BIT CPU
DWM-001 00-00
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