6.2. External view and pin assignment
External view and marking
Pin assignment
Figure 6.1 External view, marking, and pin assignment of the TLP7820
6.3. Internal block diagram
Note: Add 0.1μF bypass capacitors between Pin 1 and Pin 4 and between Pin 5 and
Pin 8.
© 2018
Toshiba Electronic Devices & Storage Corporation
Figure 6.2 Internal block diagram of the TLP7820
Pin No.
Symbol
1
V
DD1
2
V
IN+
3
V
IN-
4
GND1 Input side ground
5
GND2 Output side ground
6
V
OUT-
7
V
OUT+
8
V
DD2
17 / 19
RD014-RGUIDE-01
Description
Input side supply voltage
Positive input
Negative input
Negative output
Positive output
Output side supply voltage
2018-03-15
Rev. 1