I2C; Uart; Digital Data Bus - Parrot FC6100 ASPEN Datasheet

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IT_HOSTn is the motherboard's interruption signal to request communication with FC6100
ASPEN when slave.

7.4.2 I2C

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I2C_0
I2C 0 is a 1.8V signaling I2C link dedicated to be used on motherboard.
It can operate as a master or as a slave.
Note: On WB_FC6xxx development board, I2C_0 is used for Touch Panel Controller, external audio
codec & audio power amplifier interface.
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I2C_1
I2C 1 set as a master and is 3.3V signaling at the connector end.
It is also used internally for communication with the Audio Codec.
Its clock frequency is limited to 100 Khz in compliance with I2C default speed specification.
Note: On WB_FC6xxx board, I2C_1 is used for iPOD authentication chip communication.

7.4.3 UART

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UART_0
UART 0 is a standard UART interface with flow control signals.

7.4.4 Digital data bus

7.4.4.1 SDIO
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SDIO_0
SDIO_0 is a complete SD Card bus, capable of high speed operation (up to 48Mhz).
It is also used as secondary flash update interface.
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SDIO_1
SDIO_1 is a complete SD Card bus, capable of full speed operation (up to 48Mhz).
7.4.4.2 USB
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USB_0
USB_0 is a host or device USB interface compliant with USB2.0 High Speed Specifications.
It can also be used as OTG USB device.
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USB_1
USB_1 is a host or device USB interface compliant with USB2.0 High Speed Specifications.
7.4.4.3 SPI
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SPI_0
SPI_0 is a 1.8V SPI Bus operating as a master for up to 2 slaves. Its maximum clock frequency is
48Mhz.
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SPI_1
SPI_1 is a 1.8V SPI Bus operating as master or slave.
Its maximum clock frequency is 48MHz when master & 24Mhz when slave
Confidential Information
Ref: FC6100ASPEN-
Datasheet
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