Si2493/57/34/15/04 (Revision D) and Si2494/39
Modem Designer 's Guide
1. Introduction
The Si2494/93/57/39/34/15/04 ISOmodem chipset family consists of a 38-pin QFN (Si2494/39) or 24-pin TSSOP
(Si2493/57/34/15/04) or 16-pin SOIC (Si2493/57/34/15/04) low-voltage modem device, and a 16-pin SOIC line-
side DAA device (Si3018/10) connecting directly with the telephone local loop (Tip and Ring). This modem solution
is a complete hardware (controller-based) modem that connects to a host processor through a UART, parallel or
SPI interface. Parallel and EEPROM interfaces are available only on the 38-pin QFN or 24-pin TSSOP package
option. Refer to Table 4, "ISOmodem Capabilities," on page 10 for available part number, capability and package
combinations. Isolation is provided by Silicon Laboratories' isolation capacitor technology, which uses high-voltage
capacitors instead of a transformer. This isolation technology complies with global telecommunications standards
including FCC, ETSI ES 203 021, JATE, and all known country-specific requirements.
Additional features include programmable ac/dc termination and ring impedance, on-hook and off-hook intrusion
detection, Caller ID, loop voltage/loop current monitoring, overcurrent detection, ring detection, and the hook-
switch function. All required program and data memory is included in the modem device. When the modem
receives a software or hardware reset, all register settings revert to the default values stored in the on-chip
program memory. The host processor interacts with the modem controller through AT commands used to change
register settings and control modem operation. Country, EMI/EMC, and safety test reports are available from
Silicon Laboratories representatives and distributors.
This application note is intended to supplement the Si2494/39 Revision A, Si2493 Revision D, and the Si2457/34/
15/04 Revision D data sheets. It provides all the hardware and software information necessary to implement a
variety of modem applications, including reference schematics, sample PCB layouts, AT command and register
reference, country configuration tables, programming examples and more. Particular topics of interest can be
easily located through the table of contents or the comprehensive index located at the back of this document.
CLKOUT
Rev. 1.3 8/11
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
XTI
PLL
Clocking
EESD
EEPROM
EECLK
Interface
EECS
RXD
TXD
CTS
UART
RTS
Interface
DCD
ESC
RI
CS
WR
Parallel
RD
Interface
A0
D0-D7
SDI
SPI
SDO
Interface
SCLK
SS
INT
RESET
Figure 1. Functional Block Diagram
Copyright © 2011 by Silicon Laboratories
XTO
Data Bus
DAA
Interface
ROM
RAM
Program Bus
Si3000
Interface
AN93
C1
To Phone
Line
C2
AOUT
AOUTb
FSYNC
SDO
SDI
MCLK
AN93
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