Sharp ER-A520 Service Manual page 9

3. CPU PIN TABLE
M16C/80 PORT
PIN Pin Signal
PORT
No. name name
P00 122 D0 D0
P01 121 D1 D1
P02 120 D2 D2
P03 119 D3 D3
P04 113 D4 D4
P05 112 D5 D5
P06 111 D6 D6
P07 110 D7 D7
P10 109 P10 RAS
P11 108 P11 RBS
P12 107 P12 RCS
P13 106 P13 RDS
P14 105 P14 JAS
P15 104 P15 JBS
/INT3#
P16 103 P16 JCS
/INT4#
P17 102 P17 JDS
/INT5#
P20 101 A0 A0
P21 100 A1 A1
P22 99 A2 A2
P23 98 A3 A3
P24 97 A4 A4
P25 96 A5 A5
P26 95 A6 A6
P27 94 A7 A7
P30 92 A8 A8
P31 85 A9 A9
P32 84 A10 A10
P33 83 A11 A11
P34 82 A12 A12
P35 81 A13 A13
P36 80 A14 A14
P37 79 A15 A15
P40 78 A16 A16
P41 77 A17 A17
P42 75 A18 A18
P43 73 A19 A19
P44 72 A20 A20
/CS3#
P45 71 A21 A21
/CS2#
P46 70 A22 A22
/CS1#
USED IN PROCESSOR MODE: MICROPROCESSOR MODE (SEPARATE BUS 8bit WIDTH)
Initial After
I/O Function
value POFF
I/O In DATA BUS D0
I/O In DATA BUS D1
I/O In DATA BUS D2
I/O In DATA BUS D3
I/O In DATA BUS D4
I/O In DATA BUS D5
I/O In DATA BUS D6
I/O In DATA BUS D7
O L Out L RECEIPT
PAPER FEED A
O L Out L RECEIPT
PAPER FEED B
O L Out L RECEIPT
PAPER FEED C
O L Out L RECEIPT
PAPER FEED D
O L Out L JOURNAL
PAPER FEED A
O L Out L JOURNAL
PAPER FEED B
O L Out L JOURNAL
PAPER FEED C
O L Out L JOURNAL
PAPER FEED D
O Out L Address Bus A0
O Out L Address Bus A1
O Out L Address Bus A2
O Out L Address Bus A3
O Out L Address Bus A4
O Out L Address Bus A5
O Out L Address Bus A6
O Out L Address Bus A7
O Out L Address Bus A8
O Out L Address Bus A9
O Out L Address Bus A10
O Out L Address Bus A11
O Out L Address Bus A12
O Out L Address Bus A13
O Out L Address Bus A14
O Out L Address Bus A15
O Out L Address Bus A16
O Out L Address Bus A17
O Out L Address Bus A18
O Out L Address Bus A19
O Out L Address Bus A20
O Out L Address Bus A21
O Out L Address Bus A22
ER-A520U/ER-A530U HARDWARE DESCRIPTION
PIN Pin Signal
PORT
No. name name
P47 69 A23# A23#
/CS0#
P50 65 WR# WR#
P51 64 BHE# BHE#
P52 63 RD# RD#
P53 62 BCLK BCLK
P54 55 HLDA# HLDA#
P55 54 HOLD# HOLD#
P56 53 ALE ALE
P57 52 RDY# RDY#
P60 47 RTS0# RS2#
P61 46 CLK0 CI2#
P62 45 RxD0 RD2
P63 44 TxD0 TD2
P64 43 RTS1# RS1#
P65 42 CLK1 CI1#
P66 40 RxD1 RD1
P67 38 TxD1 TD1
P70 37 P70/ KR0#
TA0out
P71 36 P71/ KR1#
TA0in
P72 35 P72/ KR2#
TA1out
P73 34 P73/ KR3#
TA1in
P74 33 P74/ KR4#
TA2out
P75 32 P75/ KR5#
TA2in
P76 31 P76/ KR6#
TA3out
P77 30 P77/ KR7#
TA3in
P80 29 P80/ BUZZER
TA4out
P81 28 P81/ DSEN
TA4in
P82 27 P82/ POFF#
INT0#
P83 26 P83 SHEN#
/INT1#
P84 25 P84
/INT2#
P85 24 P85 NMI#
/NMI#
P86 18 P86/ Xcout
Xcout
P87 17 P87/ Xcin
Xin
P90 7 P90/ SCK
CLK3
– 8 –
I/O Initial After
Function
value POFF
O Out L Address Bus A23
O Out L WRITE STROBE
SIGNAL
O Out L NOT USED
O Out L READ STROBE
SIGNAL
O Out L BCLK CLOCK
O Out L NOT USED
I In NOT USED
O Out L NOT USED
I In NOT USED
O H In RS-232 RS2
I In RS-232 CI2
I In RS-232 RD2
O H In RS-232 TD2
O H In RS-232 RS1
I In RS-232 CI1
I In RS-232 RD1
O H In RS-232 TD1
I In KEY RETURN
SIGNAL 0
I In KEY RETURN
SIGNAL 1
I In KEY RETURN
SIGNAL 2
I In KEY RETURN
SIGNAL 3
I In KEY RETURN
SIGNAL 4
I In KEY RETURN
SIGNAL 5
I In KEY RETURN
SIGNAL 6
I In KEY RETURN
SIGNAL 7
O L In BUZZER SIG-
NAL
I In DRAWER OPEN
SENSE SIGNAL
I In P-OFF SIGNAL
I In UP-P16DP
SHEN# SINGNAL
I In NOT USED
I In NMI (CON-
NECTED TO
VDD)
O Out SUB CLOCK
(32.768kHz)
I In SUB CLOCK
(32.768kHz)
O L Out L UP-P16DP
CLOCK SIGNAL