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User's Guide
HRC
Mezzanine Board
High Rate Carrier (E4, STS3, OC3 / STM1)
for use with a PCI / PCIe Main Board
Doc. 008-02006-03a
Rev. 2013 January 22
Sky Blue Microsystems GmbH
Geisenhausenerstr. 18
81379 Munich, Germany
+49 89 780 2970, info@skyblue.de
www.skyblue.de
In Great Britain:
Zerif Technologies Ltd.
H5 Ash Tree Court
Nottingham NG8 6PY, England
+44 115 855 7883, info@zerif.co.uk
www.zerif.co.uk
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Table of Contents
Related Manuals for EDT HRC
Summary of Contents for EDT HRC
- Page 1 User’s Guide Mezzanine Board High Rate Carrier (E4, STS3, OC3 / STM1) for use with a PCI / PCIe Main Board Doc. 008-02006-03a Rev. 2013 January 22 Contact In Great Britain: Sky Blue Microsystems GmbH Zerif Technologies Ltd. Geisenhausenerstr. 18 H5 Ash Tree Court 81379 Munich, Germany Nottingham NG8 6PY, England...
- Page 2 © 1997-2013 Engineering Design Team, Inc. All rights reserved. Contact In Great Britain: Sky Blue Microsystems GmbH Zerif Technologies Ltd. Geisenhausenerstr. 18 H5 Ash Tree Court 81379 Munich, Germany Nottingham NG8 6PY, England +44 115 855 7883, info@zerif.co.uk +49 89 780 2970, info@skyblue.de www.skyblue.de www.zerif.co.uk EDT, Inc.
- Page 3 Documentation is assumed by Buyer. The exclusion of implied warranties is not permitted by some jurisdictions. The above exclusion may not apply to Buyer. Disclaimer. Seller’s Products and Documentation, including this document, are subject to change without notice. Documentation does not represent a commitment from Seller. EDT, Inc.
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Page 4: Table Of Contents
Building or Rebuilding an Application......................9 Configuring the HRC ............................... 10 Checking or Updating the PCI / PCIe FPGA Firmware................10 Loading the UI FPGA Firmware and Configuring the HRC................ 11 Using Custom FPGA Configuration Files....................11 Configuring the Channels ............................11 Basic Testing ................................ -
Page 5: Overview
OC3 / STM1 data on all four HRC channels. The HRC has four connector locations; each is occupied by either a 75- BNC coaxial interface with CMI- coded transmission, or a fiber-optic LC with a single-mode 1300 nm transceiver. -
Page 6: Companion Products
Overview Companion Products For additional resources, the HRC is designed to work with these EDT products: • Required – a PCI / PCIe Main Board (PCI SS, PCI GS, or PCIe8 LX / FX), for DMA and other resources •... -
Page 7: Installation
Installation To install the HRC, fit the connectors through the host back panel and then plug into the PCI connector. The BNC is farther from the PCI bus connector, so it can interfere with the host back panel and prevent the bottom of the HRC back panel from being inserted smoothly. -
Page 8: Fpga Configuration Files
PCI FPGA is loaded at the factory. However, you’ll need to load the required FPGA configuration file for the UI FPGA yourself. The firmware files specific to your HRC are listed at the beginning of this section. Instructions for loading them are provided in Configuring the HRC. -
Page 9: Sample Applications
Tests most EDT boards. Determines the board model and runs the correct loopback test. Building or Rebuilding an Application Executable and PCD source files are in the top-level EDT PCD directory. To build or rebuild an application, make therefore, run in this directory. -
Page 10: Configuring The Hrc
Configuring the HRC Configuring the HRC To ensure proper functioning, all EDT boards must be loaded with the correct FPGA configuration files for their FPGAs. At powerup, the PCI / PCIe FPGA is loaded automatically with the correct file from flash memory;... -
Page 11: Loading The Ui Fpga Firmware And Configuring The Hrc
The utility loads the UI FPGA configuration files, programs the registers, sets the clocks (if necessary), and gets the HRC ready to perform DMA. This utility takes, as an argument, a software initialization file, and then automatically runs the pertinent commands. -
Page 12: Connector Pinout
Channel 0 Channel 2 Channel 1 Figure 2. Connector Pinout, Fiber-optic Channel 3 receive Channel 2 transmit Channel 2 receive Channel 3 transmit Channel 0 receive Channel 1 transmit Channel 0 transmit Channel 1 receive EDT, Inc. 2013 January 22... -
Page 13: Registers
0x02 Function Access / Notes: 8-bit read-write / PCD_CMD Name Description 7–1 Not used. [no name] When set, flush output word by word. FUNCT When clear, wait for 16 words before transferring to PCI FPGA. EDT, Inc. 2013 January 22... - Page 14 When set, the least significant bit of the 32-bit data word is the first bit, and the most significant bit is the last. When clear for a channel, the most significant bit of a 32-bit word is the first bit. EDT, Inc. 2013 January 22...
- Page 15 0x23 Channel Clock Access / Notes: 8-bit read-write / HRC_CHAN_CLK Name Description 7–4 [no name] Not used. 3–0 OC3_STM1 Set when the corresponding channel requires the 155 Mb per second data rate; clear for 139 Mbps. EDT, Inc. 2013 January 22...
- Page 16 When set, enables the transmitting lasers for the corresponding channel’s fiber-optic transceiver. When clear, the laser is disabled and data cannot be transmitted on that channel. (It can be received, though.) For channels that use BNCs, these bits have no effect. EDT, Inc. 2013 January 22...
- Page 17 0x7F Board ID Access / Notes: 8-bit read-write / EDT_BOARDID Used to identify EDT mezzanine boards. A value of 0x2 in the lowest four bits indicates an extended board ID, hard-wired into a nonvolatile complex programmable logic device (CPLD). The extbdid application seeks the identifier in the board ID register; if it finds a value of 0x2, then it seeks the extended board ID from the CPLD instead.
- Page 18 Registers Table 1. EDT Board ID and Extended Board ID (CPLD) Ext. Mezzanine Bd ID Register, Main Boards Bits 3–0 Bd ID Board It Works With Detail 0 0 0 0 0x0 – RS422 LX, GS, SS –...
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Page 19: Revision Log
- 0x0F Configuration & 0x16 LSB – updated notes & data word structure table 20100600 03 • Added Revision Log. 20100600 03 Incorporated the HRC 16-channel addendum information into this guide. 20060000 00-02 LW • Created new guide. Contact In Great Britain: Sky Blue Microsystems GmbH Zerif Technologies Ltd.
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