iHome SDIO Card Specification Sheet
iHome SDIO Card Specification Sheet

iHome SDIO Card Specification Sheet

Sdi technologies memory card specification sheet
Table of Contents

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SD Specifications
Part E1
SDIO Simplified Specification
Version 2.00
February 8, 2007
Technical Committee
SD Card Association

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Summary of Contents for iHome SDIO Card

  • Page 1 SD Specifications Part E1 SDIO Simplified Specification Version 2.00 February 8, 2007 Technical Committee SD Card Association...
  • Page 2: Revision History

    SDIO Simplified Specification Version 2.00 Revision History Date Version April 3, 2006 1.10 February 8, 2007 2.00 Changes compared to previous issue Simplified Version Initial Release Added method to change bus speed (Normal Speed up to 25MHz and High Speed up to 50 MHz) Operational Voltage Requirement is extended to 2.7-3.6V Combine sections 12 (Physical Properties) and 13 (Mechanical Extensions) and add miniSDIO to the new section 13 (Physical...
  • Page 3 SDIO Simplified Specification Version 2.00 Release of SD Simplified Specification The following conditions apply to the release of the SD simplified specification ("Simplified Specification") by the SD Card Association. The Simplified Specification is a subset of the complete SD Specification which is owned by the SD Card Association.
  • Page 4: Conventions Used In This Document

    SDIO Simplified Specification Version 2.00 Conventions Used in This Document Naming Conventions Some terms are capitalized to distinguish their definition from their common English meaning. Words not capitalized have their common English meaning. Numbers and Number Bases Hexadecimal numbers are written with a lower case “h” suffix, e.g., FFFFh and 80h. Binary numbers are written with a lower case “b”...
  • Page 5: Table Of Contents

    General Description ... 1 SDIO Features ... 1 Primary Reference Document ... 1 Standard SDIO Functions... 1 SDIO Signaling Definition ... 2 SDIO Card Types ... 2 SDIO Card modes ... 2 2.2.1 SPI (Card mandatory support) ... 2 2.2.2 1-bit SD Data Transfer Mode (Card Mandatory Support) ...
  • Page 6 13.2 Full-Size SDIO ... 48 13.3 miniSDIO... 48 14. SDIO Power... 48 14.1 SDIO Card Initialization Voltages ... 48 14.2 SDIO Power Consumption ... 48 15. Inrush Current Limiting... 50 16. CIS Formats ... 51 16.1 CIS Reference Document ... 51...
  • Page 7 Basic Tuple Format and Tuple Chain Structure ... 51 16.3 Byte Order Within Tuples ... 51 16.4 Tuple Version ... 52 16.5 SDIO Card Metaformat... 52 16.6 CISTPL_MANFID: Manufacturer Identification String Tuple ... 53 16.7 SDIO Specific Extensions... 53 16.7.1 CISTPL_FUNCID: Function Identification Tuple...
  • Page 8 ©Copyright 2000-2007 SD Card Association SDIO Simplified Specification Version 2.00 Table of Tables Table 3-1 OCR Values for CMD5... 10 Table 4-1 Unsupported SD Memory Commands ... 16 Table 4-2 R6 response to CMD3 ... 16 Table 4-3 SDIO R6 Status Bits... 16 Table 4-4 Combo Card 4-bit Control ...
  • Page 9 ©Copyright 2000-2007 SD Card Association SDIO Simplified Specification Version 2.00 Table of Figures Figure 2-1 Signal connection to two 4-bit SDIO cards ... 3 Figure 3-1 SDIO response to non-I/O aware initialization... 4 Figure 3-2 Card initialization flow in SD mode (SDIO aware host) ... 7 Figure 3-3 Card initialization flow in SPI mode (SDIO aware host)...
  • Page 10: General Description

    In this state, the SDIO card is idle and draws a small amount of power (15 mA averaged over 1 second). During the normal initialization and interrogation of the card by the host, the card identifies itself as an SDIO card. The host software then obtains the card information in a tuple (linked list) format and determines if that card’s I/O...
  • Page 11: Sdio Signaling Definition

    While a SDIO host that supports only the 4-bit transfer mode is possible, its performance with a Low-Speed SDIO card may be reduced. This is because the only means to transfer data to and from a Low-Speed card would be the single byte per command transfer (using the IO_RW_DIRECT command...
  • Page 12: Signal Pins

    SDIO Simplified Specification Version 2.00 Signal Pins Figure 2-1 Signal connection to two 4-bit SDIO cards The rest of this chapter is not included in the Simplified Specification. DAT[3:0] SD Host DAT[3:0] SD I/O Card SD I/O Card...
  • Page 13: Sdio Card Initialization

    Differences in I/O card Initialization A requirement for the SDIO specification is that an SDIO card shall not cause non-I/O aware hosts to fail when inserted. In order to prevent operation of I/O functions in non-I/O aware hosts, a change to the SD card identification mode flowchart is needed.
  • Page 14 ©Copyright 2000-2007 SD Card Association SDIO Simplified Specification Version 2.00 An SDIO aware host sends CMD5 prior to the CMD55/ACMD41 pair, and thus would receive a valid OCR in the R4 response to CMD5 and continue to initialize the card. Figure 3-2 shows the operation of an SDIO aware host operating in the SD modes and Figure 3-3 shows the same operation for a host that operates in the SPI mode.
  • Page 15 SDIO Simplified Specification Version 2.00 Re-init Memory Re-init Memory MEM=0 MEM=0 No Response No Response F8=0 F8=0 Skip IO Initialize or IO=1 Skip IO Initialize or IO=1 No Response No Response IORDY=0 IORDY=0 No Response No Response Unusable card Unusable card (Inactive State) (Inactive State) Power On...
  • Page 16: Figure 3-2 Card Initialization Flow In Sd Mode (Sdio Aware Host)

    SDIO Simplified Specification Version 2.00 Execute memory initialize & MEM=0 Execute memory initialize & MEM=0 No Response No Response MRDY=0 MRDY=0 No Response No Response Unusable card Unusable card (Inactive State) (Inactive State) IO=0, MEM=1 IO=0, MEM=1 Not SD Not SD Test CCS Test CCS Card...
  • Page 17 SDIO Simplified Specification Version 2.00 Re-init Memory MEM=0 Illegal Command F8=0 Skip IO Initialize or IO=1 Execute IO Initialize & IO=0 Illegal Command IORDY=0 Power On IO=0, MEM=0 CMD0 CS=Low CMD8 is required to support CMD8 High Capacity Memory. Error Response Check Response Good Response F8=1...
  • Page 18: Figure 3-3 Card Initialization Flow In Spi Mode (Sdio Aware Host)

    SDIO Simplified Specification Version 2.00 Illegal Command IDLE=1 Illegal Command Test CCS Not SD Card CCS=0 Standard Capacity Memory Only Card Variables Number of I/O Functions (CMD5 Response) Memory Present Flag (CMD5 Response) IORDY: I/O Power-up Status (C bit in the CMD5 response) MRDY: Memory Power-up Status (OCR Bit31) HCS:...
  • Page 19: The Io_Send_Op_Cond Command (Cmd5)

    SDIO Simplified Specification Version 2.00 The IO_SEND_OP_COND Command (CMD5) Figure 3-4 shows the format of the IO_SEND_OP_COND command (CMD5). The function of CMD5 for SDIO cards is similar to the operation of ACMD41 for SD memory cards. It is used to inquire about the voltage range needed by the I/O card.
  • Page 20: The Io_Send_Op_Cond Response (R4)

    SDIO Simplified Specification Version 2.00 The IO_SEND_OP_COND Response (R4) An SDIO card receiving CMD5 shall respond with a SDIO unique response, R4. The format of R4 for both the SD and SPI modes is: Reserved Modified Number functions The Response, R4 contains the following data: S(tart bit): Start bit.
  • Page 21: Special Initialization Considerations For Combo Cards

    SDIO Simplified Specification Version 2.00 Once an SDIO card has received a CMD5, the I/O portion of that card is enabled to respond normally to all further commands. This I/O enable of the functions within the I/O card shall remain set until a reset, power cycle or CMD52 with write to I/O reset is received by the card.
  • Page 22: Figure 3-8 Re-Initialization Flow For I/O Controller

    SDIO Simplified Specification Version 2.00 The card clears RCA to 0x0000 The card keeps current RCA value Command Sequence Combo Init (After CMD7 with the correct RCA) Issue CMD52 (Reset I/O) Re-initialize I/O (CMD5) Issue CMD3 Issue CMD7 with the correct RCA (and Data Transfer) Figure 3-8 Re-Initialization Flow for I/O Controller Figure 3-8 shows the re-initialization flow for the I/O controller of a Combo card.
  • Page 23: Enabling Crc In Spi Combo Card

    ©Copyright 2000-2007 SD Card Association SDIO Simplified Specification Version 2.00 Figure 3-9 shows the equivalent command flow to re-initialize the memory controller of a Combo card. The RCA value of xxxxh denotes an RCA value of either 0x0000 or the prior RCA value. For new controller designs, a reset value of 0x0000 is recommended.
  • Page 24: Differences With Sd Memory Specification

    SDIO Simplified Specification Version 2.00 Differences with SD Memory Specification SDIO Command List Table A-14 shows the list of commands accepted by SD memory and SDIO cards when using the SD bus interface. Table A-15 shows the list of commands accepted by SD memory and SDIO cards when using the SPI bus interface.
  • Page 25: Modified R6 Response

    Bus Width For a SD memory card, the bus width for SD mode is set using ACMD6. The SDIO card uses a write to the CCCR using CMD52 to select bus width. In the case of a combo card, both selection methods exist. In this case, the host shall set the bus width in both locations by issuing both the ACMD6 and the CCCR write using CMD52 with the same width before starting any data transfers.
  • Page 26: Card Detect Resistor

    Note that Low-Speed SDIO cards support 4-bit transfer as an option. When communicating with a Low-Speed SDIO card, the host shall first determine if the card supports 4-bit transfer prior to attempting to select that mode. If a Combo card supports the lock/unlock operation, it cannot change bus width of a locked card and returns an illegal command error to a bus width switch command.
  • Page 27: Data Transfer Block Sizes

    A host communicating with a SD memory card uses CMD12 to abort the transfer of read or write data to/from the card. For an SDIO card, CMD12 abort is replaced by a write to the ASx bits in the CCCR. Normally, the abort is used to stop an infinite block transfer (block count=0).
  • Page 28: Ocr Register

    SDIO Simplified Specification Version 2.00 4.10.1 OCR Register All SD cards (memory, I/O and combo) shall have at least one OCR register. If the card is a combo card, it may have two OCR’s (one for memory and one for I/O). The memory portion of a combo card has an OCR accessed using ACMD41 and CMD58.
  • Page 29: Table 4-7 Sdio Status Register Structure

    SDIO Simplified Specification Version 2.00 identify it as an I/O only response. I/O specific status is reported by I/O response and Memory specific status is reported by Memory response except for the following case: In the SD bus mode, the card shall not respond to an Illegal Command or a command with a CRC error.
  • Page 30: New I/O Read/Write Commands

    This bit determines the direction of the I/O operation. If this bit is 0, this command shall read data from the SDIO card at the address specified by the Function Number and the Register Address to the host. The data byte is returned in the response, R5.
  • Page 31: Io_Rw_Direct Response (R5)

    CMD52 Response (SD modes) The SDIO card’s response to CMD52 in the SD mode is shown in Figure 5-2. If the operation was a read command, the data being read is returned as an 8-bit value. In addition, 15 bits of status information is returned.
  • Page 32: R5, Io_Rw_Direct Response (Spi Mode)

    R5, IO_RW_DIRECT Response (SPI mode) The SDIO card’s response to CMD52 in the SPI mode is shown in Figure 5-3. If the operation was a read command, the data being read is returned as an 8-bit value. In addition, 8 bits of status information is returned in a SPI R1 response byte as described in Fig 47 of the SD Physical Specification modified for I/O as shown in Figure 5-3.
  • Page 33: Io_Rw_Extended Command (Cmd53)

    This bit determines the direction of the I/O operation. If this bit is 0, this command reads data from the SDIO card at the address specified by the Function Number and the Register Address to the host. The read data shall be returned on the DAT[x] lines.
  • Page 34: Cmd53 Data Transfer Format

    End bit, always 1 The response from the SDIO card to CMD53 shall be R5 (the same as CMD52) as defined in 5.2. For CMD53, the 8-bit data field shall be stuff bits and shall be read as 0x00. Also, the ERROR response bit shall be type “E R X”...
  • Page 35: Sdio Card Internal Operation

    Overview Each SDIO card may have from 1 to 7 functions plus one memory function built into it. A function is a self contained I/O device. I/O functions may be identical or completely different from each other. All I/O functions are organized as a collection of registers.
  • Page 36: Suspend/Resume

    A card may accept CMD52 during data transfer if it supports Direct Commands (see SDC, Table 6-3 ). For both SD and SPI modes , if an error occurs during data transfer the SDIO card shall accept CMD52 to allow I/O abort and reset regardless of this bit value of the value of SDC .
  • Page 37: Common I/O Area (Cia)

    (master) and per function basis. The bits in the CCCR are mixed Read/Write and read only. If any of the possible 7 functions are not provided on an SDIO card, the bits corresponding to unused functions shall all be read-only and read as 0.
  • Page 38: Table 6-1 Card Common Control Registers (Cccr)

    SDIO Simplified Specification Version 2.00 Address Register Name 0x00 CCCR/SDIO Revision 0x01 SD Specification Revision 0x02 I/O Enable 0x03 I/O Ready 0x04 Int Enable 0x05 Int Pending 0x06 I/O Abort 0x07 Bus Interface Control 0x08 Card Capability 0x09- Common CIS 0x0B Pointer 0x0C...
  • Page 39 The functions shall set this bit to 1 within the timeout value defined in the TPLFE_ENABLE_TIMEOUT_VAL tuple. On power up or after a reset, this bit shall be set to 0. For any function that is not implemented on an SDIO card, this bit shall always be 0.
  • Page 40 SPI mode at any time, irrespective of the status of the card select (CS) line. If this bit is zero, then this SDIO card can only assert the interrupt line in the SPI mode when the CS line is asserted. This bit signals the capability of all functions in the SDIO card.
  • Page 41 0. This bit shall be cleared to 0 by any reset Card is a Low-Speed card. If this bit is set, it indicates that the SDIO card is a Low-Speed card (see 2.1). If this bit is clear, the SDIO card is a Full-Speed card.
  • Page 42 SDIO Simplified Specification Version 2.00 Field Type Select Function bits 3:0 These four bits are used to select a function number (0-7) or the memory of a combo card (8) for Suspend/Resume. There are 2 means to write the value of FSx. First, an I/O writes to the register in the CCCR and second, a new I/O command causes the FSx to be set to the function number in that command.
  • Page 43: Table 6-2 Cccr Bit Definitions

    Information about the use of these optional registers needs to be obtained from the SDIO card maker. Reading and/or writing these registers without understanding the vendor’s definitions may cause unexpected behavior or even damage to the card.
  • Page 44: Function Basic Registers (Fbr)

    SDIO Simplified Specification Version 2.00 6.10 Function Basic Registers (FBR) In addition to the CCCR, each supported I/O function has a 256-byte area used to allow the host to quickly determine the abilities and requirements of each function, enable power selection for each function and to enable software loading.
  • Page 45: Table 6-4 Fbr Bit And Field Definitions

    Card Information Structure (CIS) that is associated with each function. The CIS is Function defined in section 6.11. A CIS is mandatory for each function on an SDIO card. This pointer is stored in little-endian format (LSB first). This register points to the End of Chain tuple if the function is not supported on the card.
  • Page 46: Card Information Structure (Cis)

    Each function-specific CIS describes features specific to a particular function on the SDIO Card. Functions are numbered sequentially beginning with 1. The CMD5 response indicates the total number of functions, which includes ‘dummy’ functions. The host shall iterate through the CIS entries based on the CMD5 response.
  • Page 47: Bus State Diagram

    SDIO Simplified Specification Version 2.00 6.14 Bus State Diagram Figure 6-2 shows the Bus State Diagram for an SDIO card. It shows the bus states and their relations to SDIO commands and Suspend/Resume. Power On CMD3 Standby State Commands accepted in “STB”...
  • Page 48: Embedded I/O Code Storage Area (Csa)

    Version 2.00 May 9, 2006. The actual layout of files within the CSA is undefined by this specification. The use of the CSA for program or data storage for different host types requires that the SDIO card manufacturer load the programs and data in a file format that may be recognized by the host. An example of this would be the use of a specific file name saved within a specific subdirectory that is recognized and executed by a particular host operating system.
  • Page 49: Sdio Interrupts

    SDIO Interrupts In order to allow the SDIO card to interrupt the host, an interrupt function is added to a pin on the SD interface. Pin number 8, which is used as DAT[1] when operating in the 4-bit SD mode, is used to signal the card’s interrupt to the host.
  • Page 50: Terminated Data Transfer Interrupt Cycle

    Interrupt Clear Timing Since the SDIO card uses level sensitive interrupts, the host shall clear pending interrupts with an I/O read or write to some function unique area. In some host implementations, the sending of a CMD52 to the card is handled by host adapter hardware while the host CPU can execute other operations.
  • Page 51: Sdio Suspend/Resume Operation

    ©Copyright 2000-2007 SD Card Association SDIO Simplified Specification Version 2.00 SDIO Suspend/Resume Operation The procedure used to perform the Suspend/Resume operation on the SD bus is: 1. The host determines which function is currently using the DAT[3:0] line(s). 2. The host requests the lower priority or slower transaction to suspend. 3.
  • Page 52: 10. Sdio Read Wait Operation

    (CMD53) operation to temporarily stall the data transfer while allowing the host to send commands to any function within the SDIO card. To determine if a card supports the Read Wait protocol, the host shall test SRW capability bit in the Card Capability byte of the CCCR (see Table 6-1).
  • Page 53: 11. Power Control

    Power Selection Support Not all hosts can supply enough current for all SDIO cards. A host may choose to use the SDIO card in a lower power mode to increase operation time. Power Selection enables the host to switch the card to a lower power mode.
  • Page 54: Power Selection

    Table 11-1 Reference Tuples by Master Power Control and Power Select A version 1.10 SDIO card shall implement the six new tuples. A card which has SMPC set to 1, shall set a non-zero value to TPLFE_HP_AVG_PWR_3.3V and TPLFE_HP_MAX_PWR_3.3V. A card which has SPS set to 1, shall set a non-zero value to TPLFE_LP_AVG_PWR_3.3V and TPLFE_LP_MAX_PWR_3.3V.
  • Page 55: Power Control Operation

    SDIO Simplified Specification Version 2.00 • The host shall have the ability to manage power by calculating maximum current shown in the tuples and control EMPC , EPS and IOEx not to exceed total current that the host can supply. If the host does not have enough power to use the card, the host shall not enable the card.
  • Page 56: 12. High-Speed Mode

    SDIO Simplified Specification Version 2.00 12. High-Speed Mode High-Speed mode increases the bus clock rate to 50MHz and the SD bus throughput from 12.5MB/sec to 25MB/sec. For information on High-Speed mode for SD memory cards see Part 1 Physical Layer Specification Version 2.00, sections 4.3.10, 4.3.11 and 6.8.
  • Page 57: 13. Sdio Physical Properties

    SDIO designers should be low power. By reducing power consumption to a minimum, Host battery life and consumer satisfaction will be enhanced. The following power data represents the maximum that a SDIO card may draw. It is important for designers to note that a low power host may reject any SDIO card that identifies...
  • Page 58 ©Copyright 2000-2007 SD Card Association SDIO Simplified Specification Version 2.00 itself as drawing more power that the host is willing to supply, thus lower power cards may have a competitive advantage in the market. The rest of this chapter is not included in the Simplified Specification.
  • Page 59: 15. Inrush Current Limiting

    ©Copyright 2000-2007 SD Card Association SDIO Simplified Specification Version 2.00 15. Inrush Current Limiting This chapter is not included in the Simplified Specification.
  • Page 60: 16. Cis Formats

    End of Chain tuple. System software shall use the link field to validate tuples. No SDIO card tuple can be longer than 257 bytes: 1 byte TPL_CODE + 1 byte TPL_LINK + FFH byte tuple body (and this 257 byte tuple ends the chain).
  • Page 61: Tuple Version

    SDIO Card Metaformat Unlike the PCMCIA card, the SDIO card has multiple CIS areas. There is a common CIS for the entire card and a CIS assigned to each function. Because of the multiple CIS areas, the SDIO card does not need to support the CISTPL_LONGLINK_MFC tuple or the CISTPL_LINKTARGET as described in section 2.3.6 of the PCMCIA...
  • Page 62: Cistpl_Manfid: Manufacturer Identification String Tuple

    SDIO Card manufacturer code. In this case, the most significant eight bits shall be zero (0). For example, if a JEDEC manufacturer code is 89H, their SDIO Card manufacturer code is 0x0089. If a SDIO card manufacturer does not currently have a TPLMID_MANF assigned, one can be obtained at little or no cost from the PCMCIA.
  • Page 63: Cistpl_Funce: Function Extension Tuple

    A value of zero is not valid and shall not be used. This byte indicates the maximum transfer rate per one data line during data transfer. This value applies to all functions in the SDIO card. This value shall be 25 Mb/Sec (0x32) for all Full-Speed SDIO cards. The minimum value for Low-Speed SDIO cards shall be 400 Kb/Sec (0x48).
  • Page 64: Cistpl_Funce Tuple For Function 1-7

    0x00000000 While a unique serial number is not required for all devices, it is strongly recommended that SDIO card vendors place a unique serial number in this field to assist the operating systems is differentiating multiple cards of the same type.
  • Page 65 SDIO Simplified Specification Version 2.00 TPLFE_CSA_SIZE TPLFE_CSA_PROPERTY TPLFE_MAX_BLK_SIZE TPLFE_OCR TPLFE_OP_MIN_PWR TPLFE_OP_AVG_PWR TPLFE_OP_MAX_PWR TPLFE_SB_MIN_PWR TPLFE_SB_AVG_PWR TPLFE_SB_MAX_PWR TPLFE_MIN_BW TPLFE_OPT_BW TPLFE_ENABLE TIMEOUT_VAL Size of the CSA space available for this function in bytes This byte contains flags identifying properties of this function’s CSA. The bits are defined in Table 16-11 This is both the maximum block size and byte count that this function can support.
  • Page 66: Table 16-9 Tplfid_Function Field Descriptions For Functions 1-7

    The FN_WUS (Wake Up Support) bit signals the function’s support of wake-up when the function is placed into a low power state and the SDCLK is stopped. The intent is to allow a SDIO card to be placed into a low power condition and still signal the host of a wake-up event.
  • Page 67: Cistpl_Sdio_Std: Function Is A Standard Sdio Function

    SDIO Simplified Specification Version 2.00 16.7.5 CISTPL_SDIO_STD: Function is a Standard SDIO Function This tuple code (0x91) has been reserved for use by SDIO devices that conform to the application specifications for standard SDIO functions, as defined in those separate specifications. The exact format for this tuple can be found in those specifications.
  • Page 68: Appendix A

    SDIO Simplified Specification Version 2.00 A.1 SD and SPI Command List Table A-14 and Table A-15 show the commands that are supported by SD memory and SDIO devices in both SPI and SD modes. If a command is not identified as either mandatory or optional, then it is not supported by that device.
  • Page 69: Table A-15 Spi Mode Command List

    SDIO Simplified Specification Version 2.00 Supported Abbreviation Commands CMD0 GO_IDLE_STATE CMD1 SEND_OP_COND CMD5 IO_SEND_OP_COND CMD6 SWITCH_FUNC CMD9 SEND_CSD CMD10 SEND_CID CMD12 STOP_TRANSMISSION CMD13 SEND_STATUS CMD16 SET_BLOCKLEN CMD17 READ_SINGLE_BLOCK CMD18 READ_MULTIPLE_BLOCK CMD24 WRITE_BLOCK CMD25 WRITE_MULTIPLE_BLOCK CMD27 PROGRAM_CSD CMD28 SET_WRITE_PROT CMD29 CLR_WRITE_PROT CMD30 SEND_WRITE_PROT CMD32...
  • Page 70: B.1 Normative References

    SDIO Simplified Specification Version 2.00 B.1 Normative References The following documents are referenced by this specification. This specification can apply to any released versions of below SD Specifications after Version 2.00. 1) SD Specifications Part 1 PHYSICAL LAYER SPECIFICATION Version 2.00 May 9, 2006 2) SD Specifications Part 1 miniSD Card Addendum Version 2.00 January 30, 2007 3) SD Specifications Part 2 FILE SYSTEM SPECIFICATION...
  • Page 71: C.1 Abbreviations And Terms

    First In-First Out buffer Flash A type of multiple time programmable non volatile memory Full-Size SDIO Card A SDIO card with physical dimensions based on SD Physical Specification Version 1.01 Function An I/O device contained within an SDIO card High-Power SDIO...
  • Page 72 Binary interface states with defined assignment to a voltage level MBIO Multi-Block I/O miniSDIO Card A SDIO card based on the miniSD card form factor. MultiMedia Card MSB, LSB The Most Significant Bit or Least Significant Bit Operation Conditions Register...
  • Page 73: Appendix D

    ©Copyright 2000-2007 SD Card Association SDIO Simplified Specification Version 2.00 Appendix D (Informative) Appendix D is not included in the Simplified Specification. The Last Page...

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