AC-Coupled Evaluation Board source to the inputs on the evaluation board. Using equal length 50Ω impedance coaxial The SY87725L is 64-pin EPAD-TQFP package. The cables connect the outputs of the evaluation evaluation board is designed to operate with a single 3.3V board to the oscilloscope of another ±10% power supply and is configured with AC-coupled...
Micrel, Inc. SY87725L Evaluation Board Evaluation Board Schematic July 2008 M9999-071108-B hbwhelp@micrel.com or (408) 955-1690...
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The following pages show the individual test modes built position the output is pulled to ground, LOW. into the SY87725L. The diagram for each mode shows the main data flow for that mode. The table of required The test flow diagram in the Appendix lists the modes in switch settings lists the switch settings for that mode;...
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Micrel, Inc. SY87725L Evaluation Board Remote Loopback Data SIN and SOUT as well as the power supply connections to the evaluation board. The SOUT output can be This is the most basic test mode. It loops back the data monitored with a scope or a serial BERT.
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Function RCV_FSEL0/1 = 11 Sets receive CDR frequency to 2.48832Gbps (For other frequencies, refer to Receive Frequency Selection Table on page 7 of SY87725L Datasheet.) TESTb = 1 Disables factory test mode (enables normal operation) CD = 1 Enables clock and data...
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Function RCV_FSEL0/1 = 11 Sets receive CDR frequency to 2.48832Gbps (For other frequencies, refer to Receive Frequency Selection Table on page 7 of SY87725L Data sheet.) TESTb = 1 Disables factory test mode (enables normal operation) CD = 1 Enables clock and data recovery REFFREQSEL = 1 Selects RefClk of 155.52MHz...
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Micrel, Inc. SY87725L Evaluation Board CDR Bypass Mode Verifies correct operation of the receive DeMux. In this rate as the Serial Data In (SIN). For example, if REFCLK mode the CDR is bypassed so the serial data coming into is 155.52MHz, then SIN must be at 155.52Mbps. The 4-...
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Micrel, Inc. SY87725L Evaluation Board Local Loopback Data Flow Verifies correct operation of the transmit 4-bit Mux and the CLKOUT and 4-bit parallel DOUT0-3 outputs. The the receive 4-bit DeMux through the parallel interface. In CLKIN is multiplied by 4 up to the serial rate by the this mode parallel clock and data are applied to the synthesizer (clock multiplier).
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RCV_FSEL0/1 = 11 Sets receive CDR frequency to 2.48832Gbps (For other frequencies, refer to Receive Frequency Selection Table on page 7 of SY87725L Data sheet.) XMT_FSEL0/1 = 01 Sets parallel data rate to be 1.24416Gbps/4 TESTb = 1 Disables factory test mode...
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Micrel, Inc. SY87725L Evaluation Board APPENDIX TEST FLOW DIAGRAM FOR SY87725L EVALUATION BOARD July 2008 M9999-071108-B hbwhelp@micrel.com or (408) 955-1690...
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Micrel, Inc. SY87725L Evaluation Board APPENDIX TEST FLOW DIAGRAM FOR SY87725L CONTINUED July 2008 M9999-071108-B hbwhelp@micrel.com or (408) 955-1690...
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(a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s...
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