Omega iDRX-ACC User Manual page 14

Idrx signal conditioner series
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d. INPUT RANGE BIT NO. VALUE
This is one byte data (2 characters).
2. INPUT/OUTPUT CONFIGURATION:
Bit pattern is:
BIT NO. VALUE
1-0
00
01
10
11
2
0
1
3
0
1
4
0
1
5
0
1
7-6
not used set to 0
Bit 2&3 set the speed of process totalize. The time it would take process totalize to
reach the non-totalize reading is shown in the following table:
Note 1:
0
0
1
1
0
1
2
0
1
3
0
1
5-4
00
01
10
11
6
0
1
7
Degree C
TC/RTD
ACV/ACC/ST
Degree F
Degree K
Degree K
Temp. compensation
No temp compensation ----
----
----
----
----
----
----
----
FREQUENCY/PULSE (FP)
Low input level
----
Debounce contact
----
3K pull up to 5V
----
1K pull down
12.5V excit.
5V excit.
8V excit.
not used
Disable Reading Scale and Offset
Enable Reading Scale and Offset
not used
MEANING
----
PR
----
----
Totalizer
----
Totalizer
----
See Note 1
See Note 1
----
----
See Note 1
See Note 1
----
----
----
----
----
----
----
Square root
Page 10
----
FP
Freq. mode
----
Freq. mode
----
Quadrature
----
A-B mode
----
Totalize mode
----
----

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