SingMai Electronics SM06 Advanced Composite Video Interface: HD-SDI to aCVi converter module User Manual Revision 0.4 May 2017 SM06 User Manual Revision 0.4 Page 1 of 26...
17-07-2016 First Draft. 28-08-2016 Added support for NTSC/PAL encoding. 30-12-2016 Updates for Revision 2 PCB. 01-05-2017 DVI inputs removed. NTSC/PAL inputs removed. Minor schematic changes. Auto standard detection of 29/59Hz standards. SM06 User Manual Revision 0.4 Page 2 of 26...
1. Introduction SM06 is a transmitter module compatible with the aCVi Advanced Composite Video Interface format. SM06 accepts HD-SDI input format which it converts to analogue aCVi encoded video for driving both twisted pair and coaxial cable. aCVi is a method to transmit HD video over long distances of existing coaxial or twisted-pair cable networks or allow the use of less expensive RG-59/UTP cable in long distance installations.
SingMai Electronics 3. Connecting up the module The SM06 module is powered by a universal input (90-260VAC) AC-DC adaptor (see Chapter 7 for the power supply specification). The 5VDC, 12W output of this adaptor should be connected to the jack input, ‘+5V IN’, of the SM06. Once connected, the yellow LED, ‘FPGA OK’ should light, indicating the FPGA has been correctly configured and the module is running.
Figure 4 UTP connector pin assignments. Should the input to the SM06 be removed or fail, the SM06 will switch to an internal colour bar generator. The output video standard will be whatever was last detected on the inputs (e.g. if the last detected input was 1080p/30Hz, the output will be 75% colour bars at 1080p/30Hz standard).
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J9 pins 2-3 connected for the UTP aCVi input: Pull off the small pin header and place over the pins you require for your cable type. The panels can then be refitted. SM06 User Manual Revision 0.4 Page 9 of 26...
Figure 7 shows a screen capture of a camera test pattern image (HD-SDI) and Figure 8 shows that same image after aCVi transmission through 300m of RG-59 coaxial cable. SM06 User Manual Revision 0.4 Page 10 of 26...
U7 is compared with an FPGA internally generated checksum. If the two do not match the SM06 module is shut down. This means that even if the bit stream of the FPGA/EEPROM is captured the PT55 IP core will not run without U7 being fitted.
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DC levels into the data slicer. The data slicer is formed by comparator U10-D and buffered by U11 before being decoded by the PT55 aCVi encoder IP core. SM06 User Manual Revision 0.4 Page 13 of 26...
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