Block Diagrams; Block Diagram -Processor Section - Sony DP-IF5100 Service Manual

Digital surround processor
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DP-IF5100
Q Q
3 7 6 3 1 5 1 5 0

5-2. BLOCK DIAGRAMS

5-2-1. BLOCK DIAGRAM — PROCESSOR SECTION —
LINE AMP
IC101
-1
2
J101
3
L
LINE INPUT
R
R CH
-2
B+
(SW+9V)
SW101
ATT
R CH
-8dB
ATT SW
Q101
0dB
OPTICAL
RECEIVER
MODULE
IC305
DDIN
OUT
1
37
DIGITAL IN
B+
VCC
3
(+5V)
B+
39
VDD
(SW+5V)
24
VDDA
T E
L
1 3 9 4 2 2 9 6 5 1 3
• Signal Path
: ANALOG
: DIGITAL
04
w w w
A/D CONVERTER
IC102(1/2)
V IN L
ANALOG
1
1
FRONT END
DIGITAL
DELTA
AUDIO
D OUT
DECIMATION/
SIGMA
19
INTERFACE
FILTER
MODULATOR
(1/2)
V IN R
ANALOG
6
FRONT END
B+
(SW+5V)
DIGITAL AUDIO,INTERFACE RECEIVER
B+
IC304
(+3.3V)
EIAJ(AES/EBU)
DOUT
DIGITAL AUDIO
ASYNCHRONOUS
3
S/P
P/S
INTERFACE
BUFFER
DECODER
MCC
7
SYSTEM CLOCK
WC
TIMING OCCURENCE
µ-CON
8
INTERFACE
SRESET
RSTN
23
42
43
44
12
13
22
15
10
12.288M
X301
12.288MHz
IC306
12M/3V
x
a o
.
i
– 17 –
http://www.xiaoyu163.com
VPOUT
SDIB0
5
IF5000SG
SDOB0
47
CLFSG
SDOA2
22
CLRSG
SDOA1
23
LRSG
SDOA0
24
85
SDIA1
DOLBY DIGITAL(AC-3)
/PRO LOGIC,DTS
DECODER
IC307(2/2)
IC301
1
31
VDD1
71
11
41
51
VDD2
81
91
BCK
DIRSG
57
84
SDIA0
SDBCK0
F1DA
SDOB1
46
SRESET
IC
62
/BCK
83
SDBCK0
LRCK
82
SDWCK0
Q
Q
3
7
6
8
X1
SO2
SI
68
SCK2
SCK
69
CSSD
CSB
65
CSYM
CS
66
SI2
SO
67
YMMUTE
MUTE
54
B+
(UN+5.7V)
POWER
TRANSMITTER
3
LEDPOWER
SECTION
RESET
(Page 19)
u 1 6 3
y
http://www.xiaoyu163.com
2
4
8
9
9
B+
VCCS
8
24BIT AUDIO
(+3.3V)
4 SDO0
VCCQL
18
DIGITAL
SIGNAL
VCCQH
20
6
SDO2
PROCESSOR
VCCH
7
SDO3
38
IC302
10
SDO4
VCCP
45
11
SDO5
VCCC
57
14
SCKT
VCCA
74
LOGIC LEVEL
B+
15
SCKR
CONVERTER
VCCD
103
(+5V)
IC303
12 FST
13 FSR
NOSG3V
HAS
33
1
1 SCK
3
2
55 EXTAL
BUSY 3V
143
SI
HREQ
3
5
6
4
SDO1
5
2
34
35
36
37
40
43
44
20
55
54
53
52
51
48
43
3
1
5
1
5
0
8
9
BUSY 5V
38 SO2
ANI0/P10
25
NOSG 5V
39 SCK2
ANI7/P13
32
RTP0/P120
42 SCK1
1
18 INTP2/P02
RTP1/P121
2
POWER
19 INTP3/P03
A16/P60
73
SELECT
SW
37 SI2
A17/P61
74
BLOCK
EFFECT
30 ANI5/P15
A18/P62
75
SW1-5
OUTPUT
LED DRIVE
A19/P63
76
SO0
SO0
46
13
SIN
SCK0
SCK0
47
14
SCK
LEDEN
TO5/P100
82
2
EN
16 INTP0/P00
LEDLAT
LAT
21
TO6/P101
83
3
INTP5/P05
LEDRES
RES
TO7/P102
84
15
SO
22
INTP6/P06
4
5
RTP4/P124
LED DRIVE
6
RTP5/P125
13
SIN
14
SCK
40
SI1
2
EN
PROGRAM,
3
LAT
SYSTEM
9 VDD
CONTROL
15
RES
81 VDD
IC201
23 AVDD
36
AVREF1
SI0
45
4
RTP3/P123
3 RTP2/P122
15 RESET
VPP
94
m
c o
.
– 18 –
2
8
9
9
1
TRANSMITTER
LR DATA
SECTION
(Page 19)
BCK
F1DA
SRESET
LRCK
MCK
2
TRANSMITTER
SECTION
(Page 19)
2
4
9
8
2
9
9
AMUTE
DAMUTE
DISPLAY
IC205
DISPLAY
01
12
I
I
LED
08
5
D201-208
DISPLAY
IC206
DISPLAY
01
12
I
LED
I
08
5
D209-216

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