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4-12. IC PIN FUNCTION DESCRIPTION
IC104 MN66710 DAB DECODER (MAIN BOARD)
Pin No.
Pin Name
I/O
1
MPUSYNC
O
Microprocessor operation reference signal
2
NPADRDY
O
PAD data ready signal
3
MPUCLK
I
Microprocessor I/F data clock input
4
MPURX
I
Microprocessor I/F received data input
5
MPUTX
O
Microprocessor I/F send data output
6
MPUMOD
I
Microprocessor I/F mode
7
TEST0
I
Test mode setting
8
TEST1
I
Test mode setting
9
TEST2
I
Test mode setting
10
TEST3
I
Test mode setting
11
NRST
I
Master reset input
12
V
0
—
Digital V
SS
SS
13
V
0
—
Digital V
DD
DD
14
MCLK24
I
Master clock (23.576 MHz) input
15
MCLK0
O
Output of master clock oscillator circuit
16
DAOUT
O
SPDIF digital audio I/F output
17
AUXDAT
I
Audio ADC serial data input
18
SMCK
O
Audio AD/DA master clock
19
SLRCK
O
Audio AD/DA LR clock
20
SCLK
O
Audio AD/DA serial clock output
21
SDAT
O
Audio DAC serial data output
22
RDIU0
O
Auxiliary output for RD expansion
23
RDIU1
O
Auxiliary output for RD expansion
24
RDIU2
O
Auxiliary output for RD expansion
25
RDIIN
I
RD1 input
26
RDIU3
O
Auxiliary output for RD expansion
27
RDIU4
O
Auxiliary output for RD expansion
28
RDIU5
I
Auxiliary input for RD expansion
29
RDIOUT
O
RD1 output
30
V
1
—
Digital V
SS
SS
31
V
1
—
Digital V
DD
DD
32
FD3EN
I
General purpose data output enable
33
FW4
O
General purpose data output window 4
34
FW3
O
General purpose data output window 3
35
FW2
O
General purpose data output window 2
36
FW1
O
General purpose data output window 1
37
FWFIC
O
General purpose data output window 0
38
FCLK3
O
General purpose data output clock
39
FERF3
O
General purpose data output error flag
40
FDAT3
O
General purpose data output data
41
RAD4
O
External DRAM address bit 4
42
RAD5
O
External DRAM address bit 5
43
RAD6
O
External DRAM address bit 6
44
RAD3
O
External DRAM address bit 3
45
RAD2
O
External DRAM address bit 2
46
RAD1
O
External DRAM address bit 1
47
RAD0
O
External DRAM address bit 0
48
V
2
—
Digital V
SS
SS
49
V
2
—
Digital V
DD
DD
50
RAD7
O
External DRAM address bit 7
Description
28
Pin No.
Pin Name
I/O
51
RAD8
O
External DRAM address bit 8
52
NRAMOE
O
External DRAM output enable
53
NRCAS
O
External DRAM column address strobe
54
RAD9
O
External DRAM address bit 9
55
NRRAS
O
External DRAM row address strobe
56
NRAMWE
O
External DRAM write enable
57
RDT1
I/O
External DRAM data bit 1
58
RDT0
I/O
External DRAM data bit 0
59
RDT2
I/O
External DRAM data bit 2
60
RDT3
I/O
External DRAM data bit 3
61
V
3
—
Digital V
SS
SS
62
DSPMON0
O
DSP monitor output bit 0
63
DSPMON1
O
DSP monitor output bit 1
64
DSPMON2
O
DSP monitor output bit 2
65
DSPMON3
O
DSP monitor output bit 3
66
DSPMON4
O
DSP monitor output bit 4
67
DSPMON5
O
DSP monitor output bit 5
68
DSPMON6
O
DSP monitor output bit 6
69
DSPMNEN
I
DSP monitor output enable
70
CIRSYN
O
Sync signal output for CIR display
71
CTLLR
O
AFC/CIR DAC LR clock
72
CTLCLK
O
AFC/CIR DAC clock
73
CTLDAT
O
AFC/CIR DAC data
74
V
4
—
Digital V
SS
SS
75
V
3
—
Digital V
DD
DD
76
FSY0
O
Frame sync signal output
77
NULDET
I
NULL symbol detected signal input
78
AV
A
Analog V
SS
SS
79
ADVRB
A
ADC bottom-side reference voltage
80
ADIN
A
ADC analog input
81
ADVRT
A
ADC top-side reference voltage
82
AV
A
Analog V
DD
DD
83
VREF
—
Reference power supply for 5 V input pad
84
IQMOD
I
Digital IQ generation selector input
28
Description
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