Advertisement
www.freeservicemanuals.info
5/30/2017
The stereo composite signal from the buffer amplifier undergoes phase compensation by
R301 and C201, is led through the muting switching FET H301 to the input terminal pin (2) of
the MPX stereo decoding IC H321 on PLL (Phase Locked Loop) basis, and is decoded into the
left and right stereo signals, which become available at pins (4) and (5), respectively. These
decoded left and right stereo audio signals are introduced through the low pass filter consisting of
L301 to L304 and C311 to C320 for elimination of undesirable residual switching signal and
through the de-emphasis network consisting of R325, R326, C321 and C322 to the npn-pnp
direct coupled audio amplifier, where the signals are amplified to a required level for the output
from J311 and J313. From these jacks, the audio signals are led through the function switch to
the TAPE MONITOR OUT jacks. Figure 1 presents an internal block diagram showing the
functions of the PLL basis MPX stereo decoding IC HA1156. The input stereo composite signal,
amplified by the audio amplifier, is delivered to the phase detectors PD-1 and PD-2. A part of the
stereo composite signal is also delivered to the stereo decoder section. The VCO (Voltage Control
Oscillator) produces a free run oscillation in the neighborhood of 76kHz with the time constant
determined by the capacitor C305 and resistors R311 and R312 set on the outside of pin (14).
The VCO output has its frequency divided into 19kHz through the two frequency divider stages
(DIV-1, DIV-2), and is reversed to the phase detector PD-1, which contains two input terminals
designed to produce an output in proportion to the product of the two input signals. The signal
led to one PD-1 input is a 19kHz square wave formed through frequency division of the 76kHz
VCO output signal by the two frequency divider stages DIV-1 and DIV-2, and the 19kHz pilot
signal included in the stereo composite signal as a reference signal is led to the other PD-1 input.
Therefore, the output of the PD-1 which has passed through the low pass filter LPF-1 provides
DC output voltage in proportion to the phase variance between the two inputs. This DC output
voltage is amplified by the DC amplifier, and is supplied to the 76kHz VCO as a control voltage.
This means that the output frequency and phase of the VCO have been phaselocked to the input
pilot signal. The 38kHz sub-carrier reproduced by the PLL, as stated above, is delivered through
the-stereo switch to the stereo decoder section as switching signal, thus driving the decoder stage.
One PD-2 input is given the 19kHz resulting from the frequency division completed by the DIV-1
and DIV-3, whereas the other input gets the 19kHz output contained in the composite signal, and
the output is provided with a DC output in proportion to the amplitude of the pilot signal.
Digitized in Heiloo Netherland
Advertisement
