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Aaeon FWS-2271 User Manual

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FWS-2271
Network Appliance
User's Manual 1
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  • Page 1 FWS-2271 Network Appliance User’s Manual 1...
  • Page 2 AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp.  Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel  Corporation Core, Atom are trademarks of Intel Corporation ...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity FWS-2271  SATA cable  SATA power cable  Power adapter  HDD bracket kit  Rubber foot  If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document. Preface...
  • Page 6 All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale. Do not use any cables or adapters not supplied by AAEON to prevent system malfunction or fires.
  • Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation. Caution: There is a danger of explosion if the battery is incorrectly replaced.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................8 List of Jumpers ......................10 2.3.1 CF Power Selection (JP1) ................11 2.3.2 Auto PWRBTN Selection (JP2) ...............
  • Page 12 3.4.8 Advanced: Power Management ............48 3.4.9 Advanced: Digital I/O Port Configuration .......... 50 Setup submenu: Chipset ..................51 3.5.1 Chipset: North Bridge ................52 3.5.1.1 North Bridge: AMI Graphic Output Protocol Policy ....53 Setup submenu: Security ..................54 Setup submenu: Boot ...................

  • Page 13: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 14: Specifications

    Specifications System Intel ® Pentium ® N4200/N3350 processor Processor  204-pin DDR3L 1867MHz SODIMM slot x 1, up System Memory  to 8GB Chipset  Intel® i211 (Co-lay with Intel® i210) Ethernet  Gigabit Ethernet x 6 (BOM Optional 4 Ports) Supports up to 2 pairs bypass function Bypass ...
  • Page 15 Power LED x 1 Front Panel I/O  Status LED x 1 HDD Active LED x 1 Bypass LED x 2 LAN LED x 12 USB 3.0 Port x 2 Rear Panel I/O  RJ-45 Port x 6 (BOM Optional RJ-45 Port x 4) RJ-45 Console x 1 12V DC Power Input x 1 Software Programmable button x1...
  • Page 16 Display Graphic Engine Intel® HD Graphics  Output Interface HDMI  RJ-45 console x 1 Serial Port  Reserved box header Keyboard and Mouse  USB 3.0 Type A on I/O side x 2  Environmental 0 ~ 40°C (32 ~ 104°F) Operating Temperature ...

  • Page 17: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 18: Dimensions

    Dimensions System Chapter 2 – Hardware Information...
  • Page 19 Board Component Side Solder Side Chapter 2 – Hardware Information...

  • Page 20: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 21 Solder Side Chapter 2 – Hardware Information...

  • Page 22: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function CF POWER Selection Auto PWRBTN Selection CN12 CMOS Setting Selection Chapter 2 – Hardware Information...

  • Page 23: Cf Power Selection (Jp1)

    2.3.1 CF Power Selection (JP1) 1 2 3 3.3V (Default) 2.3.2 Auto PWRBTN Selection (JP2) Don’t use Auto PWRBTN (Default) Use Auto PWRBTN 2.3.3 CMOS Setting Selection (CN12) 1 2 3 Normal (Default) Clear CMOS Chapter 2 – Hardware Information...

  • Page 24: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function DIMM1 DDR3L SODIMM SOCKET CPU_FAN1 4P SMART FAN KB/MS CON1 COM PORT SATA6G INTERFACE SATA POWER CN10/CN30 Mini Pci-E socket CN28...

  • Page 25: Digital I/O (Cn1)

    2.4.1 Digital I/O (CN1) This connector offers 4-pair of digital I/O functions and address is 801H. The pin definitions are illustrated below: Signal Signal Digital- IN/OUT(Port1 Bit 1) Digital- IN/OUT (Port1 Bit 2) Digital- IN/OUT (Port1 Bit 4) Digital- IN/OUT (Port1 Bit 5) Digital- IN/OUT (Port3 Bit 4) Digital- IN/OUT (Port3 Bit 5) Digital- IN/OUT (Port6 Bit 3)

  • Page 26: Hard Disk Drive Installation

    Hard Disk Drive Installation Remove the screws, then the back cover. Chapter 2 – Hardware Information...
  • Page 27 Remove the screws on the PCB-Bracket. Remove the screws, and take off the upper casing. Chapter 2 – Hardware Information...
  • Page 28 Remove the screws for the PCB Bracket, and then remove the PCB Bracket itself. Chapter 2 – Hardware Information...
  • Page 29 Remove both screws on the left hand side. Remove both screws on the right hand side. Chapter 2 – Hardware Information...
  • Page 30 Remove the screws for the DC Power, then take out the back cover. Slot the SATA Cable and the POWER cable together, and secure them with a fastener. Chapter 2 – Hardware Information...
  • Page 31 After assembling the parts, close the cover and secure the DC Power screws and bolts. 10. Secure both screws on the left hand side. Secure both screws on the right hand side. Chapter 2 – Hardware Information...
  • Page 32 12. Secure the screws on the PCB Bracket. 13. Assemble the anti-vibration pad and put it onto the HDD Bracket. 14. Secure the screws onto the anti-vibration pad. Chapter 2 – Hardware Information...
  • Page 33 15. Secure the HDD Bracket onto the HDD. 16. Secure the SATA Cable and the Power Cable onto the HDD, and assemble the HDD within the apparatus. Chapter 2 – Hardware Information...
  • Page 34 17. Assemble the lower cover and secure the screws. 18. Secure the PCB Bracket screws. Chapter 2 – Hardware Information...
  • Page 35 19. Secure the screws. Chapter 2 – Hardware Information...

  • Page 36: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 37: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.

  • Page 38: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...

  • Page 39: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 40: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 41: Advanced: Trusted Computing

    3.4.1 Advanced: Trusted Computing Options summary: Security Device Support Disabled Enabled Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA-1 PCR Bank Disabled Enabled Enable or Disable SHA-1 PCR Bank SHA256 PCR Bank Disabled...
  • Page 42 Pending operation None TPM Clear Schedule an Operation for the Security Device. NOTE: Your Computer will reboot during restart in order to change State of Security Device. Platform Hierarchy Disabled Enabled Enable or Disable Platform Hierarchy Storage Hierarchy Disabled Enabled Enable or Disable Storage Hierarchy Endorsement Hierarchy Disabled...

  • Page 43: Advanced: Cpu Configuration

    TPM 1.2 will restrict support to TPM 1.2 devices, TPM 2.0 will restrict support to TPM 2.0 devices, Auto will support both with the default set to TPM 2.0 devices if not found, TPM 1.2 devices will be enumerated 3.4.2 Advanced: CPU Configuration Options summary: Intel Virtualization Technology Disabled...
  • Page 44 Enabled Enable/Disable Intel SpeedStep Power Limit 1 Enable Disabled Enabled Enable/Disable Power Limit 1 Chapter 3 – AMI BIOS Setup...

  • Page 45: Advanced: Sata Drives

    3.4.3 Advanced: SATA Drives Options summary: Chipset SATA Disabled Enabled Enables or Disables the Chipset SATA Controller. The Chipset SATA controller supports the 2 black internal SATA ports (up to 3Gb/s supported per port). Chapter 3 – AMI BIOS Setup...

  • Page 46: Advanced: Usb Configuration

    3.4.4 Advanced: USB Configuration Options summary: Legacy USB Support Disabled Enabled Enables Legacy USB support. AUTO option disables legacy support if no USB devices are connected. DISABLE option will keep USB devices available only for EFI applications. Chapter 3 – AMI BIOS Setup...

  • Page 47: Advanced: Hardware Monitor

    3.4.5 Advanced: Hardware Monitor Options summary: System Fan Smart Control Disabled Enabled For En/Disable Fan 1 Smart Control. Enabled: FAN is running in accordance with user settings. Disabled: FAN is always running with full speed Fan Control Mode Automatic Mode Manual Mode Manual Mode: Depends on PWM Duty.
  • Page 48 The PWM Duty of FAN Spin Range:[0 - 255] Off Control Temperature 30 (0-127) Temperature Limit Value of Fan Off. Note: Some fans have the minimum speed even if the PWM value is 0 Start Control Temperature 50 (0-127) Temperature Limit Value of FAN Start Control Full Speed Temperature Temperature Limit Value of FAN Full Speed PWM Slope...

  • Page 49: Advanced: Sio Configuration

    3.4.6 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 50: Sio Configuration: Serial Port Configuration

    3.4.6.1 SIO Configuration: Serial Port Configuration Options summary: Use This Device Disabled Enabled Enable or Disable this Logical Device. Possible: Use Automatic Settings IO=2F8h; IRQ=3; IO=3F8h; IRQ=4; Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.
  • Page 51 3.4.6.1.1 Serial Port Configuration: Serial Port Console Redirection Options summary: Console Redirection Disabled Enabled Console Redirection Enabled or Disabled. Chapter 3 – AMI BIOS Setup...

  • Page 52: Console Redirection Settings

    3.4.6.1.2 Console Redirection Settings Options summary: Terminal Type VT100 VT100+ VT-UTF8 ANSI Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100+: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes. Bits per second 9600 19200...
  • Page 53 115200 Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds. Data Bits Data Bits Parity None Even Mark Space A parity bit can be sent with the data bits to detect some transmission errors. Even: parity bit is 0 if the num of 1’s in the data bits is even.
  • Page 54 Enabled Enable VT-UTF8 Combination Key Support for ANSI/VT100 terminals Recorder Mode Disabled Enabled On this mode enabled only text will be send. This is to capture Terminal data. Resolution 100x31 Disabled Enabled Enables or disables extended terminal resolution Legacy OS Redirection Resolution 80x24 80x25 On Legacy OS, the Number of Rows and Columns supported redirection...
  • Page 55 3.4.6.1.3 Legacy Console Redirection Settings Legacy Serial Redirection Port COM0 Select a COM port to display redirection of Legacy OS and Legacy OPROM Messages Chapter 3 – AMI BIOS Setup...
  • Page 56 3.4.6.1.4 Serial Port for Out-of-Band Management/Windows Emergency Management Services (EMS) Options summary: Terminal Type VT100 VT100+ VT-UTF8 ANSI VT-UTF8 is the preferred terminal type for out-of-band management. The next best choice is VT100+ and then VT100. See above, in Console Redirection Settings page, for more Help with Terminal Type/Emulation.
  • Page 57 115200 Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds. Flow Control None Hardware RTS/CTS Software Xon/Xoff Flow control can prevent data loss from buffer overflow. When sending data, if the receiving buffers are full, a ‘stop’...

  • Page 58: Advanced: Lan Bypass Configuration

    3.4.7 Advanced: LAN Bypass Configuration Options summary: STATUS LED CTRL LED OFF RED LED ON RED LED BLINK RED LED FAST BLINK GREEN LED ON GREEN LED BLINK GREEN LED FAST BLINK Configure LAN Bypass Status LED. LAN kit Power ON Bypass PassTru Setting LAN kit function behavior when power on.(Bypass/Pass Through)
  • Page 59 LAN kit Power Off Bypass PassTru Setting LAN kit function behavior when power off.(Bypass/Pass Through) WDT configuration Force Bypass SystemReset Configure WDT behavior , System Reset Force Bypass Chapter 3 – AMI BIOS Setup...

  • Page 60: Advanced: Power Management

    3.4.8 Advanced: Power Management Options summary: Power Mode ATX Type AT Type Select Power Supply Mode. Restore AC Power Loss Power Off Power On Last State Select AC power state when power is re-applied after a power failure. RTC Wake system from S5 Disabled Fixed time Dynamic time...
  • Page 61 Fixed Time: System will wake on the hr::min::sec specified. Dynamic Time: System will wake on the current time + Increase minute(s) Wake up day (Fixed time option) Select 0 for daily system wake up, 1-31 for which day of month that you would like the system to wake up.

  • Page 62: Advanced: Digital I/O Port Configuration

    3.4.9 Advanced: Digital I/O Port Configuration DIO_P#1~4 Input Output Set DIO as Input or Output DIO_P#5~8 Input Output Set DIO as Input or Output DIO_P#1~4 Direction High Set output level when DIO pin is output Chapter 3 – AMI BIOS Setup...

  • Page 63: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 64: Chipset: North Bridge

    3.5.1 Chipset: North Bridge Options summary: Primary Display PCIe Select which of IGD/PCI Graphics device should be Primary Display Chapter 3 – AMI BIOS Setup...

  • Page 65: North Bridge: Ami Graphic Output Protocol Policy

    3.5.1.1 North Bridge: AMI Graphic Output Protocol Policy Options summary : Output Select HDMI1 Output Interface Chapter 3 – AMI BIOS Setup...

  • Page 66: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set password for limit BIOS access - If ONLY the Administrator's password is set, a password window will be prompted when user can enters Setup utility. User can(Note#1) enter Setup utility with limited access(Note#2), if user presses "Enter Key"...
  • Page 67 meanwhile, user access level in Setup utility depends on password given. Note: BIOS can be customized to disallow user enter setup in such situation. How user is limited" will need to be customized according customer's actual application. Removing the Password Highlight this item and type in the current password.

  • Page 68: Setup Submenu: Boot

    Setup submenu: Boot Options summary : Quite Boot Disabled Enabled Enables or disables Quiet Boot option. Network Stack Disabled Enabled Enable/Disable UEFI Network Stack Chapter 3 – AMI BIOS Setup...

  • Page 69: Setup Submenu: Exit

    Setup submenu: Exit Chapter 3 – AMI BIOS Setup...

  • Page 70: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 71: Driver Installation

    Driver Installation Please download the driver from AAEON website. It contains all the drivers and utilities you need to setup your product. Follow the steps below to install the drivers. http://www.aaeon.com/en/p/desktop-network-appliance-fws-2271 Step 1 – Install Chipset Drivers Open the Step 1 - Chipset folder followed by the SetupChipset.exe file...

  • Page 72: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...

  • Page 73: Watchdog Timer Initial Program

    Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 74 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 75 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
  • Page 76 ************************************************************************************ // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
  • Page 77 ************************************************************************************ VOID SIOEnterMBPnPMode(){ Switch(SIOIndex){ Case 0x2E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0x55); Break; Case 0x4E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0xAA); Break; VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0x02); IOWriteByte(SIOData, 0x02); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN);...
  • Page 78 ************************************************************************************ VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 << BitNum); TmpValue |= (Value << BitNum); IOWriteByte(SIOData, TmpValue); SIOExitMBPnPMode(); VOID SIOByteSet(byte LDN, byte Register, byte Value){ SIOEnterMBPnPMode();...

  • Page 79: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...

  • Page 80: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 81 Appendix B – I/O Information...

  • Page 82: Memory Address Map

    Memory Address Map Appendix B – I/O Information...
  • Page 83 Appendix B – I/O Information...

  • Page 84: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 85 Appendix B – I/O Information...
  • Page 86 Appendix B – I/O Information...
  • Page 87 Appendix B – I/O Information...
  • Page 88 Appendix B – I/O Information...
  • Page 89 Appendix B – I/O Information...
  • Page 90 Appendix B – I/O Information...
  • Page 91 Appendix B – I/O Information...
  • Page 92 Appendix B – I/O Information...

  • Page 93: Appendix C - Standard Lan Bypass Platform Setting

    Appendix C Appendix C - Standard LAN Bypass Platform Setting...

  • Page 94: Status Led

    Status LED The LED status indicator of FWS-2271 is programmable with AAEON SDK for your application. Table1: LED Status STA_LED2 STA_LED1 STA_LED0 LED Off Red LED On Red LED Blink Red LED Fast Blink Reserved Green LED Blink Green LED Fast Blink...
  • Page 95 Sample Code: ***************************************************************************************** #define Byte CPLD_SLAVE_ADDRESS //This parameter is represented from Note1 #define Byte OFFSET //This parameter is represented from Note2 ***************************************************************************************** bData = aaeonSmbusReadByte(CPLD_SLAVE_ADDRESS, OFFSET); switch( LED_FLAG) case 0: //LED Off //BIT2=0, BIT1=0, BIT0=0 bData = bData & 0xF8; break;...
  • Page 96 bData = (bData & 0xF8) | 0x07; break; case 5: //Green LED Blink //BIT2=1, BIT1=0, BIT0=1 bData = (bData & 0xF8) | 0x05; break; case 6: //Green LED Fast Blink //BIT2=1, BIT1=1, BIT0=0 bData = (bData & 0xF8) | 0x06; break;...

  • Page 97: Lan Bypass

    LAN Bypass Table1: LAN Kit ID Select LAN_ID2 LAN_ID1 LAN_ID0 LAN kit selected LAN Kit 1 Selected LAN Kit 2 Selected Table2: LAN Bypass register table Function Description LAN_ID3 Use for selecting which LAN kit will be LAN_ID2 configured, refert to Table 1 of ID Select table of LAN kit.
  • Page 98 Table3: LAN Bypass register mapping table CPLD Slave Address 0x90 (Note1) Attribute Offset(SMBUS) BitNum Value LAN_ID3 0x01(Note2) (Table 1) LAN_ID2 0x01(Note2) (Table 1) LAN_ID1 0x01(Note2) (Table 1) LAN_ID0 0x01(Note2) (Table 1) PWR_ON 0x01(Note2) (Table 2) PWR_OFF 0x01(Note2) (Table 2) WDT_EN 0x01(Note2) (Table 2) ACT_EN...
  • Page 99 // Set Reg01h bit0 if(bLanSel & 0x01) bData = bData | 0x01; else bData = bData & 0xFE; // Power On Action (Reg01h bit6) if(SET_PASS_THROUGH) // Pass Through bData = bData & 0xBF; else // Bypass bData = bData | 0x40; // Power Off Action (Reg01h bit5) if(SET_PASS_THROUGH) // Pass Through bData = bData &...

  • Page 100: Software Reset Button Configuration

    Software Reset Button Configuration Table 1: Soft Reset Button register mapping table Attribute Register(I/O) BitNum Value BTN_STS 0xA05(Note1) 4(Note2) (Note3) Table 2: LAN Bypass register table Function Description Reading this register returns the pin level status which is normal high active low. BTN_STS 0: Pin Level States Low.

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