General Standards Corporation PC104P-SIO4BX Hardware User Manual page 37

Feature Register - Local Offset 0xFC (0x00001AF3)
D31:D21 Unused
D20 0 = No Rx Status byte
D19:D18 00 = No Timestamp
D17:D16 00 = No FPGA Reprogram
D14:D15 0 = No configurable space
D13 0 = No FIFO Test Bit
D12 1 = FWType_Reg Valid at Local Offset 0xF8
D11:D8 FW Feature Level (Set at common code level)
1 = RS232 support, Pin Source Change
2 = Multi-Protocol support
3 = Common Internal/External FIFO Support
4 = FIFO Latched Underrun/Overrun/Level
5 = Demand mode DMA Single Cycle for Tx
6 = DMA_Single_Cycle_Dis, updated Pin_Src TxAuxC
7 = Rx Underrun Only, Reset Status
8 = Clock to 50Hz with 10Hz resolution
9 = No Legacy Support (No Clock Control Register)
A = Falling Int fix
D7 1 = DMA Single Cycle Disable
D6 1 = Board Reset, FIFO present bits
D5 1 = FIFO Size/Counters present
D4 1 = FW ID complies with this standard
D3:D0 Clock Oscillator
0x0 = Fixed
0x1 = ICD2053B (1 Osc)
0x2 = ICD2053B (4 Osc)
0x3 = CY22393 (4 Osc)
0x4 = 2 x CY22393 (6 Osc)
8302A Whitesburg Drive Huntsville, AL 35802, Phone: (256) 880-8787
PC104P-SIO4BX User Manual, Revision: 0
General Standards Corporation