Hannel In Tatus Ocal Ffset 009C - General Standards Corporation PC104P-SIO4BX Hardware User Manual

D5:3 USC_RxC Source
Defines the Clock Source for the USC_RxC pin. The clock source must agree with the USC
Clock setup (USC I/O Control Reg D5:3) to ensure the signal is not being driven by both the
USC and the FPGA.
D5
0
0
0
0
1
1
1
1
D2:0 USC_TxC Source
Defines the Clock Source for the USC_TxC pin. Since this signal is bidirectional (it may be
used as either an input or output to the USC), the clock source must agree with the USC Clock
setup (USC IO Control Reg D2:0) to ensure the signal is not being driven by both the USC
and the FPGA.
D2
0
0
0
0
1
1
1
1
2.1.12 Channel Pin Status: Local Offset 0x0090 / 0x0094 / 0x0098 / 0x009C
Unused inputs may be utilized as general purpose input signals. The Channel Pin Status Register allows the input
state of all the IO pins to be monitored. Output signals as well as inputs are included to aid in debug operation.
D31:D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
8302A Whitesburg Drive Huntsville, AL 35802, Phone: (256) 880-8787
D4 D3 USC_RxC Source
0 0 Prog Clock
0 1 Inverted Prog Clock
1 0
1 1
0 0 Cable RxC Input
0 1 Cable RxAuxC Input
1 0 RESERVED
1 1 Driven from USC
D1 D0 USC_TxC Source
0 0 Prog Clock
0 1 Inverted Prog Clock
1 0
1 1
0 0 Cable RxC Input
0 1 Cable RxAuxC Input
1 0 RESERVED
1 1 Driven from USC
RESERVED
TxAuxC Output
RxAuxC Input
DCD Output
RTS Output
TxD Output
TxC Output
DCD Input
CTS Input
RxD Input
RxC Input
PC104P-SIO4BX User Manual, Revision: 0
General Standards Corporation
USC IOCR D2:D0 Setup
'0'
'1'
IOCR D2:D0 != 000 (Output)
USC IOCR D5:D3 Setup
'0'
'1'
IOCR D5:D3 != 000 (Output)
000 (Input)
000 (Input)
000 (Input)
000 (Input)
000 (Input)
000 (Input)
--------
000 (Input)
000 (Input)
000 (Input)
000 (Input)
000 (Input)
000 (Input)
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