SingMai Electronics SM08 Advanced Composite Video Interface: aCVi to HD-SDI converter module User Manual Revision 0.2 July 2016 SM08 User Manual Revision 0.2 Page 1 of 36...
SingMai Electronics Revision History Date Revisions Version 11-07-2016 First Draft. 23-07-2016 Added chapter on the test points. Added comment on the Quartus version. Added 720p/25Hz-30Hz standards to aCVi description. Specifications updated. SM08 User Manual Revision 0.2 Page 2 of 36...
HD video over long distances of existing coaxial or twisted-pair cable networks or allow the use of less expensive RG-59/UTP cable in long distance installations. SM08 can accept either twisted pair or coaxial cable inputs (build option) and supports the following HD aCVi formats: 720p-25/30/50/59/60Hz, 1080p-24/25/29/30Hz, 1080i-50/59/60Hz as well as NTSC-M/PAL and NTSC-960H and PAL-960H video standards.
Once connected, the green LED, ‘Program OK’, should light, indicating the FPGA has been correctly programmed. See Figure 2. SM08 can accept either coaxial or twisted pair cable inputs, but this is a build option for the board and needs to be specified at the time of order.
SingMai Electronics 4. Circuit description Figures 5-13 show the schematics for the SM08. The component overlay for the PCB is shown in Appendix A. Below is a brief technical description of the SM08 module. Sheet 1. J1 is the 5VDC power input connector to the SM08 module. The 5VDC is protected from over- voltage and reverse polarity inputs by D1, D2 and resettable fuse, F1.
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U8 is compared with an FPGA internally generated checksum. If the two do not match the SM08 module is shut down. This means that even if the bit stream of the FPGA/EEPROM is captured the PT51 IP core will not run without U8 being fitted.
LVDS outputs, together with an LVDS clock, to the HD-SDI/SDI serialiser IC, U17, which converts these five data signals into one 1.485GHz/270MHz, HD-SDI/SDI compatible, output (J4). Components L5 and R61 are used to improve the return loss. Figure 5 SM08 schematics - sheet 1. SM08 User Manual Revision 0.2 Page 12 of 36...
Install and open the Quartus programmer. The screen should look similar to Figure 15. The new FPGA image will be sent as a file called SM08.pof. Set the programming mode to ‘Active Serial Programming’. If everything is OK the programmer should recognize the serial EEPROM (shown as EPCS4).
PT51 decoder IP core. The location of the test points, TP2 and TP3, is shown in Figure 16. Figure 16 SM08 Test point location. By default they are programmed to monitor the horizontal and vertical sync pulses from the PT51 decoder.
SingMai Electronics Figure 18 shows the vertical (field) sync output (TP2) and the aCVi input waveform for 720p/60Hz standard and a 75% colour bar test signal. Figure 18 Vertical sync test output. SM08 User Manual Revision 0.2 Page 24 of 36...
-3 to +20dB. HD-SDI/SDI output: 20 bit 4:2:2 YCbCr format. The following measurements were made using a SingMai SM01 video pattern generator, the SM08 evaluation board, and a Tektronix WFM700 SDI waveform monitor. Figure 19 NTSC 75% colour bars - waveform.
SingMai Electronics Appendix C: AC-DC adaptor The specification for the supplied AC-DC adaptor is shown in Figures 30 and 31. Figure 30 AC-DC adaptor specification- Page 1. SM08 User Manual Revision 0.2 Page 35 of 36...
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