Inverter Circuit - Acer AL1717 Service Manual

Acer
TSUM56AL deals with signal internally. TVS101, TVS102, TVS103 are ESD protector to
prevent U105 from ESD.
- Signal DDC_SCL (series clock) inputs via CN103#15, and then passes through ZD101 Zener for
ESD protection, goes into U105 #31.
- Signal DDC_SDA (series data) inputs via CN103#12, and then passes through ZD107 Zener for
ESD protection, goes into U105 #30.
- Signal TTL vertical sync. (Vsync) inputs via CN103 #14, and then clamped by ZD105 Zener,
passes through R129, and then goes into IC U105 (TSUM56AL) #28.
- Signal TTL horizontal sync. (Hsync) inputs via CN103 #13, and then clamped byZD106 Zener,
passes through FB101,R130, and then goes into IC U105 (TSUM56AL) #27.
- CN103#5 is defined as cable detect pin, this detector realize passes through R122 Pull hight, go
into U105#35.
- U103 power is supplied by PC via CN103#9, or supplied by Monitor self via D103.
- U103 is an EEPROM IC which is memory and EDID data saved in it.
3.2.2 Buttons Control
- Button "Power" on right side bezel connects to U105 (TSUM56AL) #88 through R161, via
CN105#4.
- Button "UP" "DOWN ""MENU" "AUTO" on right side bezel connects to U105 (TSUM56AL)
#91,#90,#89,#92 through R158,R159,R160,R157,via CN105 #7, #6, #5, #8.
- U108 is an EEPROM IC which memory OSD setting and save the value adjusted by user.
- LED Indicator on Front Bezel
a. When press button "power", U105 (TSUM56AL) #42 sends out a low potential, via R188,
flow to CN105 #2 on keypad, LED Blue ON.
b. When in "Suspend" mode, U105 (TSUM56AL) #41 sends out a low potential, via R189, flows
to CN105 #1 on keypad, LED Amber ON.
3.2.3 Mstar CHIP U105 (TSUM56AL)
- U105 (TSUM56AL) #54. #55. #58~#65 output 8 bit even LVDS digital data to panel control
circuit through CN104.
- U105 (TSUM56AL) #67~#74. #77. #78 output 8 bit odd LVDS digital data to panel control
circuit through CN104.
- U105 (TSUM56AL) #86 outputs Brightness "PWM" signals to control CCFL brightness.
- U105 (TSUM56AL) #48 output PPWR "H" potential to make Q103 conducted, and then make
Q101 conducted, +5V flow to CN104#1~#3 as Panel VDD .
- U105 (TSUM56AL) #85 output CCFL_ON/OFF "H" potential to control Inverter on/off.
- TCLK by Crystal 14.318MHz input to U105 (TSUM56AL) #96,#97.
Please refer to TSUM56AL Pin Assignments table in page
3.2.4 Regulator Circuit
- +5V is from switching mode power supply for Panel used.
- +3.3V generates from +5V through C101 and C103 filtering and U101 which is output +3.3V
LDO for U103, U106,U108 and U105 used.
- +1.8V generates from +5V through C101 and C103 filtering and U102 which is output +1.8V
LDO, for U105 used.
3.2.5 Audio circuit
- Audio Signal R,L,GND input through P701,#2,#5,#1, Stop DC via C711, C712, and then enter
into U701 (TDA7496L) analog input terminal #4,#9.
- U701 (TDA7496L) #14,#17 output R,L audio data to Speaker through CN701.
- U105 (TSUM56AL) #94 output MUTE "H" potential to control U701on/off.
- U105 (TSUM56AL) #93 outputs Volume "PWM" signals to control U701 Volume.

4. Inverter circuit

4.1 Low voltage to high voltage circuit
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