National Semiconductor ADC10080 Manual

10-bit, 80 msps, 3v, 78.6 mw a/d converter
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ADC10080
10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter

General Description

The ADC10080 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 10-bit
digital words at 80 Megasamples per second (MSPS). This
converter uses a differential, pipeline architecture with digital
error correction and an on-chip sample-and-hold circuit to
provide a complete conversion solution and to minimize pow-
er consumption, while providing excellent dynamic perfor-
mance. A unique sample-and-hold stage yields a full-power
bandwidth of 400 MHz. Operating on a single 3.0V power
supply, this device consumes just 78.6 mW at 80 MSPS, in-
cluding the reference current. The Standby feature reduces
power consumption to just 15 mW.
The differential inputs provide a full scale selectable input
swing of 2.0 V
, 1.5 V
P-P
P-P
single-ended input. Full use of the differential input is recom-
mended for optimum performance. An internal +1.2V preci-
sion bandgap reference is used to set the ADC full-scale
range, and also allows the user to supply a buffered refer-
enced voltage for those applications requiring increased ac-
curacy. The output data format is user choice of offset binary
or two's complement.
This device is available in the 28-lead TSSOP package and
will operate over the industrial temperature range of −40°C to
+85°C.

Connection Diagram

© 2008 National Semiconductor Corporation
, 1.0 V
, with the possibility of a
P-P
200485
Features
Single +3.0V operation
Selectable full-scale input swing
400 MHz −3 dB input bandwidth
Low power consumption
Standby mode
On-chip reference and sample-and-hold amplifier
Offset binary or two's complement data format
Separate adjustable output driver supply

Key Specifications

Resolution
Conversion Rate
Full Power Bandwidth
DNL
SNR (f
= 10 MHz)
IN
SFDR (f
= 10 MHz)
IN
Power Consumption, 80 Msps
Applications
Ultrasound and Imaging
Instrumentation
Cellular Base Stations/Communications Receivers
Sonar/Radar
xDSL
Wireless Local Loops
Data Acquisition Systems
DSP Front Ends
20048501
February 1, 2008
10 Bits
80 MSPS
400 MHz
±0.25 LSB (typ)
59.5 dB (typ)
−78.7 dB (typ)
78.6 mW
www.national.com

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Summary of Contents for National Semiconductor ADC10080

  • Page 1: General Description

    ADC10080 10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter General Description Features ■ The ADC10080 is a monolithic CMOS analog-to-digital con- Single +3.0V operation verter capable of converting analog input signals into 10-bit ■ Selectable full-scale input swing digital words at 80 Megasamples per second (MSPS). This ■...
  • Page 2: Ordering Information

    Ordering Information ≤ ≤ NS Package Industrial (−40°C +85°C) ADC10080CIMT 28 Pin TSSOP ADC10080CIMTX 28 Pin TSSOP Tape & Reel ADC10080EVAL Evaluation Board Block Diagram 20048502 www.national.com...
  • Page 3: Pin Descriptions And Equivalent Circuits

    Pin Descriptions and Equivalent Circuits Pin No. Symbol Equivalent Circuit Description ANALOG I/O Inverting analog input signal. With a 1.2V reference the full-scale input signal level is a differential 1.0 V . This pin may be tied to − (pin 4) for single-ended operation. Non-inverting analog input signal.
  • Page 4 3, 11, 14 DIGITAL POWER Positive digital supply pins for the ADC10080's output drivers. This pin should be bypassed to digital ground with a 0.1 µF monolithic capacitor located within 1 cm of this pin. A 4.7 µF capacitor should DDIO also be used in parallel.
  • Page 5: Absolute Maximum Ratings

    (Notes 1, 2) ≤ ≤ If Military/Aerospace specified devices are required, Operating Temperature Range −40°C +85°C please contact the National Semiconductor Sales Office/ (Supply Voltage) +2.7V to +3.6V Distributors for availability and specifications. (Output Driver Supply DDIO 3.9V +2.5V to V...
  • Page 6: Dc And Logic Electrical Characteristics

    DC and Logic Electrical Characteristics Unless otherwise specified, the following specifications apply for V = 0V, V = +3.0V, V = +2.5V, V = 2 V , STBY = 0V, V = 1.20V (External), f = 80 MHz, 50% Duty SSIO DDIO Cycle, C...
  • Page 7: Ac Electrical Characteristics

    78.6 mW. The values for maximum power dissipation listed above will be reached only when the ADC10080 is operated in a severe fault condition. Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through 0Ω.
  • Page 8: Specification Definitions

    MISSING CODES are those output codes that will never ap- quency and f through f are the RMS power in the first 6 pear at the ADC outputs. The ADC10080 is guaranteed not harmonic frequencies. to have any missing codes. Second Harmonic Distortion (2nd Harm) is the difference...
  • Page 9: Timing Diagram

    Timing Diagram 20048509 FIGURE 1. Clock and Data Timing Diagram Transfer Characteristics 20048510 FIGURE 2. Input vs. Output Transfer Characteristic www.national.com...
  • Page 10: Typical Performance Characteristics

    Typical Performance Characteristics Unless otherwise specified, the following specifications apply: = 0V, V = +3.0V, V = +2.5V, V = 2 V , STBY = 0V, V = 1.2V (External), f = 80 MHz, f , 39 MHz, SSIO DDIO 50% Duty Cycle.
  • Page 11 INL vs. Clock Duty Cycle SNR vs. V DDIO 20048518 20048519 SNR vs. V SNR vs. f 20048521 20048520 INL vs. Temperature SNR vs. Clock Duty Cycle 20048523 20048522 www.national.com...
  • Page 12 SNR vs. Temperature THD vs. V 20048524 20048525 THD vs. V THD vs. f DDIO 20048527 20048526 SNR vs. IRS THD vs. IRS 20048528 20048529 www.national.com...
  • Page 13 SINAD vs. V SINAD vs. V DDIO 20048531 20048530 THD vs. Clock Duty Cycle SINAD vs. Clock Duty Cycle 20048532 20048533 THD vs. Temperature SINAD vs. Temperature 20048534 20048535 www.national.com...
  • Page 14 SINAD vs. f SFDR vs. V DDIO 20048536 20048537 SINAD vs. IRS SFDR vs. f 20048538 20048539 SFDR vs. V SFDR vs. IRS 20048541 20048540 www.national.com...
  • Page 15 SFDR vs. Clock Duty Cycle Spectral Response @ 10 MHz Input 20048542 20048543 SFDR vs. Temperature Spectral Response @ 39 MHz Input 20048544 20048545 Power Consumption vs. f 20048546 www.national.com...
  • Page 16: Functional Description

    1.5 STBY PIN The STBY pin, when high, holds the ADC10080 in a power- down mode to conserve power when the converter is not being used. The power consumption in this state is 15 mW.
  • Page 17 DDIO SSIO large charging current spikes can cause on-chip noise and ADC10080. Figure 5 shows a typical differentially driven in- couple into the analog circuitry, degrading dynamic perfor- put. Figure 6 shows a single ended application circuit. mance. Adequate bypassing, limiting output capacitance and 20048549 FIGURE 5.
  • Page 18 20048550 FIGURE 6. A Simple Application Using a Single Ended Driving Source www.national.com...
  • Page 19: Physical Dimensions

    Physical Dimensions inches (millimeters) unless otherwise noted 28-Lead TSSOP Package Ordering Number ADC10080CIMT NS Package Number MTC28 www.national.com...
  • Page 20 Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH www.national.com/webench Audio www.national.com/audio Analog University www.national.com/AU Clock Conditioners www.national.com/timing App Notes www.national.com/appnotes Data Converters www.national.com/adc Distributors www.national.com/contacts Displays www.national.com/displays...

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