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L−Band Tuner with 2−Channel 500 MHz A/D and Digital Downconverters ® Onyx Family VPX Board Setting the Standard for Digital Signal Processing Pentek, Inc. One Park Way Upper Saddle River, NJ 07458 Manual Part Number: 820.52791 (201) 818-5900 Rev: 1.0 - July 25, 2016 www.pentek.com...
The list above includes all the standard parts that are shipped with the Pentek Model 52791. The options for this product are described in this Getting Started Guide and in the Pentek Model 52791 Installation Manual (included in the box).
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Page 4 Model 52791 Ge t t i n g S t a rt e d G uid e Introduction ® This document describes the Pentek Model 52791 Onyx Family VPX board, its associated software, what to consider before installation, and installation steps.
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Therefore, consider the following before installation: Pentek Model 71791 XMC Module Switch SW1 − FPGA Configuration When you install Model 52791, you may need to set DIP switch SW1 on the 71791 XMC module (which controls FPGA configuration) based on the characteristics of your host bus.
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Page 6 Model 52791 Ge t t i n g S t a rt e d G uid e Before You Begin: Jumper and Switch Settings (continued) Pentek Model 5201 VPX Carrier Switches Clock Driver Operation: DIP switch SW1 selects modes for the XMC interface clock drivers.
Page 7 Before You Begin: Consider the Product’s Options Timing and Synchronization The following timing and synchronization options are available for the Model 52791 VPX board’s A/D converters. For more information, refer to the Model 71791 Operating Manual. • External sample clock: Received from the front panel SSMC connector labeled EXT CLK.
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Page 8 Model 52791 Ge t t i n g S t a rt e d G uid e Timing and Synchronization (continued) • Reference clock: The front panel has one SSMC coaxial connector for a tuner reference clock input, labeled REF CLK. The external reference clock signal must be a sine wave of 0.5 −...
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The 71791 is shipped with the FPGA configuration SW (SW1-2) set to ON, which sets the board’s maximum speed to Gen 3 x8. However, the Model 5201 carrier limits the number of lanes to x4. For more information, refer to Section 2.4 in the Model 52791 Installation Manual.
JTAG board. NOTE: If your Model 52791 has Option 741, you must use a 5HP width (1") VPX slot. NOTE: The JTAG PCB on the Model 52791 board (on the Model 71791 XMC module) is used for downloading new FPGA configuration code.
+10 dBm, into 50 input impedance, with a frequency range from 925 MHz to 2175 MHz. The other cabling you install on the Model 52791’s front panel depends on how you want to handle timing and synchronization (see Tim−...
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The ribbon cable is included with the shipment of both Xilinx pro− gramming cables. To install the FPGA Design Kit for the Model 52791’s Processing FPGA, copy the \Gate- Flow folder on the DVD−ROM to the root directory of the C: drive of the system you’ll be working on.
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Model 52791 Getting St arted Guide Page 13 Step 6: Using the Software ReadyFlow Software The User’s Guide for each ReadyFlow BSP provides instructions for using the Ready− Flow software. Chapter 3 provides the following: • Introduction to ReadyFlow − Provides an overview of how the software is used.
Part No Type / Description 800.52791 Installation Manual - Model 52791 L-Band Tuner with 2-Channel 500 MHz A/D and 2 DDCs on 3U VPX Carrier 800.71791 Operating Manual - Model 71791 1-Ch L-Band Tuner with 2-Channel 500 MHz A/D and 2 DDCs XMC Module 809.7x791 Supplemental Manual - Vendor Data Sheets for Model 7x730 Series Operating Manuals...