Circuit Description - Kenwood DV-502 Service Manual

QQ
3 7 63 1515 0
1. MPEG: STI5519
Port No.
Audio DAC
51 DAC SCLK
52 DAC PCMOUT0
53 DAC PCMOUT1
54 DAC PCMOUT2
55 DAC PCMCLK
56 DAC LRCLK
57 SPDIF OUT
48 VDD PCM
49 VSS PCM
Clock & Reset
124 RESET
122 VDD PLL
123 VSS PLL
120 PIX CLK
PIOs and communication
186 PIO0(0) T STROBE
187 PIO0(1) MOD SW
188 PIO0(2) VFD STB
189 PIO0(3) VFD CLK
190 PIO0(4) VFD DATA OUT
191 PIO0(5) VFD DATA IN
PIO0(6) SLIDER SENSOR
TE
L 13942296513
192 OPEN/CLOSE
(DRAWER POSITION)
PIO0(7) SLIDER IN
193
(DRAWER CCW/CTRL)
194 PIO1(0) SDA
195 PIO1(1) SCL
PIO1(2) SLIDER OUT
196
(DRAWER CW CTRL)
197 PIO1(3) TXD(JIG)
200 PIO1(4) RXD(JIG)
201 PIO1(5) FRONT TXDI
202 TRIGGER IN
203 TRIGGER OUT
204 PIO2(0) H/P IND
205 PIO2(1) FRONT RXD
206 PIO2(2) MIC IN
207 PIO3(8) MIC OUT
208 PIO2(4) AUDIO MUTE
1 PIO2(5) RGB SEL(BLANK)
2 PIO2(6) VIDEO MUTE
3 PIO2(7) 16: 9 INDICATOR
6 PIO3(0) SCART H(TV/AUX)
7 PIO3(1) POWER CTL
8 PIO3(2)
www
9 PIO3(3)
10 PIO3(4) IR REMOCON
11 PIO3(5)
.
12 PIO3(6)

CIRCUIT DESCRIPTION

Port Name I/O
O Over sampling clock
O PCM out 0
- PCM out 1 (unused)
- PCM out 2 (unused)
I/O PCM clock
O Left/Right clock
O SPDIF out
- VDD(+3V3)
- GND
I Chip reset
- VDD PLL
- GND
I 27MHz main clock
I/O PIO0(0)
I/O PIO0(1)
I/O PIO0(2)
I/O PIO0(3)
I/O PIO0(4)
I/O PIO0(5)
I/O PIO0(6)
I/O PIO0(7)
I/O PIO1(0)
I/O PIO1(1)
I/O PIO1(2)
I/O PIO1(3)
I/O PIO1(4)
I/O PIO1(5)
I/O Trigger in for DCU
I/O Trigger out for DCU
I/O Unused
I/O Unused
- Unused
- Unused
I/O Audio mute
I/O RGB sel.(blank)
I/O Video mute
I/O 16 : 9 indicator
I/O PIO3(0)
I/O PIO3(1)
I/O Unused
I/O Unused
x ao
y
I/O PIO3(4)
I/O Unused
i
I/O Unused
DV-502/503/DVF-3050/3550
8
Main
Function
EXT AUD REQ
UART0 data
Q Q
3 6 7 1 3
SSC0 data (MTSR out/MRST in)
SSC0 clock
PARA DVALID
UART2 RXD
PARA SYNC
PARA DATA(0)
PARA DATA(1)
PARA DATA(2)
PARA DATA(3)/CAPTURE IN0
u163
PARA DATA(4)/CAPTURE IN1
PARA DATA(5)/CAPTURE IN2
.
PARA DATA(6)/UART1 CTS
(CTS1)
2 9 9 4 2 8
Note: Port list sorted by function for MPEG IC
Alternate function
Input
EXT AUD CLOCK
EXT AUD DATA
EXT AUD WCLK
ATAPI RD
ATAPI WR
1 5 0 5 8 2 9 9 4
UART2 TXD
UART1 RXD
m
co
UART1 RTS(RTS1)
UART2 RTS(RTS2)
COMP OUT1
9 9
Output
2 8 9 9
5