Block Diagram - Pico Macom PIDA-1000 Installation And Operation Manual

D E S C R I P T I O N S

Block Diagram

FREQUENCY OFFSETS - FCC (U.S.A.)
NOTES:
1. FOR PASSIVE RETURN, CONNECT J3 TO P1 AND P4.
2. FOR ACTIVE RETURN, CONNECT J1 TO P1 AND P2 ANDJ2 TO P3 AND P4
3. PLUG-IN EQUALIZERS AND ATTENUATORS ARE OPTIONAL. IF PLUG-INS ARE TO BE USED
REMOVE JUMPER WIRE AT APPROPRIATE LOCATION AND INSERT PLUG-IN
5
PICO MACOM, INC.
RF OUTPUT
RETURN PATH INPUT
49 MHz
HPF
FLAT
SLOPE CONTROL
CIRCUIT
FULL
GAIN CONTROL
CIRCUIT
HYBRID AMP
1
W3
W2
49 MHz
HPF
RF INPUT
RETURN PATH OUTPUT
TEST PORT
(-30dB)
ATT.
36 MHz
LPF
FULL
GAIN CONTROL
CIRCUIT
P4
J2
P3
J3
P2
J1
P1
W8
36 MHz
LPF
ATT.
TEST PORT
(-30dB)