Explore EP9134 User Manual

4-port dvi/hdmi splitter
Hide thumbs Also See for EP9134:

Advertisement

Quick Links

User Guide — EP9134_UG V0.2
4 Ports HDMI 1.3 Splitter
EP9134
User Guide
V0.2
Revised: Mar. 14, 2008
Original Release Date: Aug. 27, 2007
Explore
Explore reserves the right to make changes without further notice to any products herein to improve reliability, function or design.
Explore does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it
convey any license under its patent rights nor the rights of others. Explore products are not designed, intended, or authorized for use
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for
any other application in which the failure of the Explore product could create a situation where personal injury or death may occur.
Should Buyer purchase or use Explore products for any such unintended or unauthorized application, Buyer shall indemnify and hold
Explore and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses,
and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended
or unauthorized use, even if such claim alleges that Explore was negligent regarding the design or manufacture of the part.
Explore Confidential Proprietary
1
NON-DISCLOSURE AGREEMENT REQUIRED

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the EP9134 and is the answer not in the manual?

Questions and answers

Summary of Contents for Explore EP9134

  • Page 1 Explore reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Explore does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
  • Page 2: Revision History

    User Guide — EP9134_UG V0.2 Revision History Version Revision Author Description of Changes Number Date Aug/27/2007 Jerry Chen Initial Version Jan/11/2008 Ether Lai Revised Version Mar/14/2008 Ether Lai Revise Register Description; Change package type; Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...
  • Page 3: Section 1 Introduction

    Section 1 Introduction 1.1 Overview The EP9134 is a 4-Port DVI/HDMI splitter with integrated HDCP decryption/encryption engines and is compliant with HDMI Rev 1.3b and HDCP Rev 1.2 specifications. The EP9134 receives DVI/HDMI inputs, process HDCP decryption and encryption and transmits the data to 4 DVI/HDMI ports. The chip uses an external EE to store the encrypted HDCP receiver/transmitter keys.
  • Page 4 User Guide — EP9134_UG V0.2 Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...
  • Page 5: Section 2 Overview

    SCL3 Registers EXT_RSTb & EXT_SWING Logics DVI/HDMI SDA1 HDCP Keys IIC Slave Receiver SCL1 SDA2 IIC Master SCL2 DVI/HDMI DVI/HDMI HDCP Keys HDCP Keys Transmitter Transmitter DVI/HDMI DVI/HDMI HDCP Keys HDCP Keys Transmitter Transmitter Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...
  • Page 6: Pin Diagram

    AVDD EXT_RES PVDD EXT_RSTb PVSS VDD18 AVSS AVSS SCL1 TX20+ SDA1 TX20- SCL2 AVDD SDA2 TX10+ VDDE TX10- VSSE AVSS reserved AVSS reserved TX00+ SCL3 TX00- SDA3 AVDD V_OUT TXC0+ HTPLG0 TXC0- HTPLG1 AVSS Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...
  • Page 7: Pin Description

    Differential Clock Output Pairs for transmitter port 0 TXC0+ Hot Plug Input HTPLG0 This pin is used to monitor the "HOT PLUG" signal for tansmitter port 0. Note: This input is only 3.3V tolerant and has no internal debouncer circuit. Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...
  • Page 8 Table 2-5 Power and Ground Pins IN / NAME DESCRIPTION VDDE Digital Power, 3.3V VSSE Digital Ground VDD18 Core Power, 1.8V Core Ground AVDD Analog Power, 3.3V AVSS Analog Ground PVDD Analog Power for PLL, 3.3V Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...
  • Page 9 User Guide — EP9134_UG V0.2 Table 2-5 Power and Ground Pins IN / NAME DESCRIPTION PVSS Analog Ground for PLL _AVSS Analog Ground Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...
  • Page 10: Electrical Characteristics

    -0.3 Ambient Temperature (with power applied) 1 Guaranteed by design. DC Digital I/O Specifications (under normal operating conditions unless otherwise specified) Symbol Parameter Conditions Units High-level Input Voltage Low-level Input Voltage High-level Output Voltage Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...
  • Page 11 Channel to Channel Differential Input Skew pixel Differential Input Clock Jitter Tolerance IJIT Delay from OUT_EN Low to High Impedance outputs Link Disabled (Tx power down) to LINK_ON Low Link Enabled (DE Active) to LINK_ON High edges Explore Confidential Proprietary NON-DISCLOSURE AGREEMENT REQUIRED...

Table of Contents