Übersicht - Grundig Toronto 32-7830 T Service Manual

GRUNDIG Service
Übersicht / Overview
Scaler P. 2-34 Power
+1.8V RESET
#RESET
+2.5V
+3.3V PWM0
+5V
AUWS
+5V_SW
AUSD0
+12V
AUSCK
AVDD_DVI (3.3V)
AUMCK
AVDDA (3.3V)
DELAY
AVDD_SIF (3.3V)
MUTE_S
AVDD_AU (3.3V)
ST.BY
AVDD_MemPLL (3.3V)
24VSENSE
AVDD_MPLL (3.3V)
MADR[0..11]
VDDC (1.2V)
MDATA[0..15]
VDDM (2.5V)
RXO0-/RA7
VDDP (3.3V)
RXO0+/RA6
+DMC (+2.5V)
RXO1-/RA5
+DMQ (+2.5V)
RXO1+/RA4
TXCLK-
RXO2-/RA3
TXCLK+
RXO2+/RA2
TX0-
RXOC-/RA1
TX0-+
RXOC+/RA0
TX1-
RXO3-/GA7
TX1+
RXO3+/GA6
TX2-
RXE0-/GA3
TX2+
RXE0+/GA2
SCL_HD
RXE1-/GA1
SDA_HD
RXE1+/GA0
RIN+ RXE2-/BA7
RXE2+/BA6
RIN-
GIN+ RXEC-/BA5
GIN- RXEC+/BA4
BIN+ RXE3-/BA3
Tuner / COFDM Demodulator
BIN- RXE3+/BA2
VS_RGB
SPDIF_OUT
HS_RGB
AUOutL2
SOG
AUOutR2
SCG+
BR_IN
SCR+
BR_OUT
SCB+
SC_CVBS1
SCG-
VPANEL
SCB-
ST.BY
SCR-
SC1_FSW
SOY KEY_IN_Z-Touch (KEY_IN)
Y+
SDA_Z-Touch (SDA2)
PB+
SCL_Z-Touch (SCL2)
PR+
IR_Z-Touch (IR_IN)
Y-
PB-
PR-
SC_CVBS2
SC_Chroma
SV_Y0
SV_C0
VCOM2
SC_CVBS1
DVB_CVBS
CVBS1
VCOM1
TUNER_CVBS
VCOM0
ON_PBACK
ON_PANEL
HPDCTRL
I2C_SCL
I2C_SDA
TXD
RXD
SC2_Mode
SIFP0
SIFM0
AUR0
AUL0
AUL1
AUR1
AUL2
AUR2
AUL3
AUR3
AUMONO
PIP_Y
PIP_C
PIP_CVBS
DCR_ON
RTC_INT
RX_Scart 2
TX_Scart 2
TS_DATA[0..7]
TS_CLK
TS_VALID
TS_START
SDA_COFDM
SCL_COFDM
ANTPOWER
RESET_COFDM
ITU...
P. 2-25 VGA Socket
VPANEL
ON_PBACK
PWM0 24VSENSE
+5V
ON_PANEL
+9V_A
ST.BY
BR_IN
TXD
BR_OUT
RXD
AU_SWA
SPDIF
+1.2V COMPR
+1.8V
COMPL
+2.5V
+3.3V
+5V
+5V_SW
+9V
+12V
+12V_SW
+24V
+24V_PANEL
+33V
AVDD_DVI (3.3V)
AVDDA (3.3V)
AVDD_SIF (3.3V)
AVDD_AU (3.3V)
AVDD_MemPLL (3.3V)
AVDD_MPLL (3.3V)
VDDC (1.2V)
VDDM (2.5V)
VDDP (3.3V)
P. 2-31 Amplifier
+1.2V SIFP0 +3.3V
SIFM0
+1V2A_DIG_FE +5V_SW
+1V2D_DIG_FE +12V
+3.3V TUN_CVBS +24V
TUNER_CVBS
+3V3A_DIG_FE
MUTE_S
+3V3D_DIG_FE VCOM0
ST.BY
+5V
TS_DATA[0..7]
AUOut_R
+5V-IF
TS_CLK
AUOut_L
+5V_OUT
TS_VALID
+5V_SW
AUOut_R1
TS_START
AUOut_L1
I2C_SCL
I2C_SDA
SCL5V
SDA5V
SDA_COFDM
SCL_COFDM
A/D
ANTPOWER
RESET_COFDM
IDTV Board
Power Supply
+5V
+5V_SW +5V_DVB
ST.BY ST.BY
TS_DATA[0..7] TS_TUN_DATA[0..7]
TS_CLK TS_TUN_CLK
TS_VALID TS_TUN_VALID
TS_START TS_TUN_SYNC
SDA_COFDM SDA_MD
SCL_COFDM SCL_MD
ANTPOWER ANT_POW
RESET_COFDM F_RESET
RX_DVB RXD1B
TX_DVB TXD1B
RESET_DVB RESET_DVB
AISCK MPEG_ABCK
SPDIF_IN MPEG_SPDIF
AISD MPEG_ADO
AIWS MPEG_ALRCK
DVB_CVBS D_CVBS_IN
RX_Scart 2
TX_Scart 2
ITU_CLK 656CLK
ITU656D[0..7] 656D[0..7]
P. 2-27 HDMI Sockets P. 2-28
+1.8V
RIN+ TXCLK-
+3.3V
RIN- TXCLK+
+5V
GIN+ TX0-
TX0-+
GIN-
HPDCTRL
BIN+ TX1-
I2C_SCL
BIN- TX1+
I2C_SDA
VS_RGB TX2-
#RESET
HS_RGB TX2+
HDMI_INT
SOG
SCL_HD
SDA_HD
AUR0
AUL0
P. 2-33
LOUD_OUT_R
LOUD_OUT_L
HP_OUT_R
HP_OUT_L
MPEG Decoder & CPU
P. 2-40
3V3_ASTBY
2V5_ASTBY
1V5_ASTBY
ID_TS_ERROR
TS_CLK
TS_VALID
TS_SYNC
CI_DIR
RXD1B
TXD1B
SCL_MD
SDA_MD
GRDYB
RESET
RXD0B
TXD0B
ST.BY
2 - 43
Chassis BL (LX prime IDTV)
AV Sockets P. 2-29 SCART Sockets
SV_Y0 +5V
SV_C0
+5V_SW
SVHS_Y +9V
SVHS_C
+9V_A
VCOM2
+9V_A_SCART1
FAV_L +9V_A_SCART2
+3.3V
FAV_R
AUOutL3
FAV_CVBS
AUOutR3
VCOM1
VCOM1
AUL2
AUOutL2
AUR2
AUOutR2
CVBS1
SVHS_Y
SOY
SVHS_C
Y+
FAV_CVBS
PB+
PR+
I2C_SCL
Y-
I2C_SDA
PB-
TUN_CVBS
PR-
DVB_CVBS
SPDIF_OUT SPDIF
AUWS
AUSD0
AUSCK
AUMCK
P. 2-40 Common Interface
TS_DATA[0..7] +5V_DVB TS_TUN_CLK
RDATA[0..15] 3V3_ASTBY TS_TUN_SYNC
RADDRESS[0..22] F_RESET TS_TUN_VALID
TXD1B RADDRESS22
RXD1B
TS_TUN_DATA[0..7]
TS_SW TS_SW
EMI_SW TS_DATA[0..7]
656CLK FCSB0
656... EMI_SW
CI_CD2
RDATA[0..15]
CI_REG TS_CLK
CI_INPACK TS_SYNC
CI_RESET
TS_VALID
CI_IOWR CI_IREQ
CI_IORD CI_CD1
CI_IREQ CI_VS1
CI_CD1 CI_CD2
CI_VS1
CI_REG
MPEG_ABCK CI_RESET
MPEG_AMCK CI_IOWR
MPEG_ADO CI_IORD
MPEG_SPDIF FWEB
MPEG_ALRCK
FOEB
FWEB GCS0B
FOEB RADDRESS[0..22]
GCS0B
FCSB0
D_CVBS_IN
RADDRESS22
F_RESET
ANT_POW
P. 2-30
SC1_CVBS
SCG+
SCR+
SCB+
SC_CVBS1
SCG-
SCB-
SCR-
SC1_OUT
SC1_FSW
AUL1
AUR1
SC1_Mode
SC2_Chroma
SC2_CVBS
SC_CVBS2
SC_Chroma
SC2_OUT
SC2_Mode
PIP_CVBS
PIP_Y
PIP_C
P. 2-42
CI_DIR
CI_INPACK
GRDYB