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Perun Technologies LARA-100 User Manual

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LARA-100 MOTHERBOARD
USER MANUAL

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Summary of Contents for Perun Technologies LARA-100

  • Page 1 PERUN Technologies LARA-100 MOTHERBOARD USER MANUAL...

  • Page 2: Table Of Contents

    PERUN Technologies CONTENTS First things first: LARA-100 platform ..................... 2 Why LARA-100? ..........................2 What is LARA-100? ........................2 LARA 100 MOTHERBOARD ........................7 Technical data ............................. 39 PWM outputs circuit ........................42 Protection logic – error signal generation circuit ................ 43 Overcurrent protection circuit ....................

  • Page 3: First Things First: Lara-100 Platform

    1.1 W LARA-100? The vision behind LARA-100 is to serve its users as a sort of a LAunch RAmp for Power Electronics control development, research and education. It emerged as the comprehensive answer to the permanent need for flexibility and comfortable performance in the PE laboratory.
  • Page 4 PERUN PowerDesk software suite. The role of LARA's Expansion Boards together with the PERUN PowerDesk SW is crucial in the concept of LARA-100 as the open and configurable platform. The role of Expansion Boards is:  interfacing with popular controllers such as Texas Instruments C2000 series ...
  • Page 5 (Bode plots, etc.) Very important fact is that PERUN PowerDesk can be utilized as an integral part of LARA-100 system as described above, but also it can be employed as a standalone software package. In this scenario a user can develop and test a control code on Texas Instruments C2000 controller using Perun PowerDesk for all mentioned purposes except for system configuration (since there is no LARA's hardware).
  • Page 6 PERUN PowerDesk tools proceed with evaluation, testing and re- design. LARA-100 with its HW and SW components presents well rounded and open re-configurable platform Figure 3 Frequently asked questions related to PERUN PowerDesk software suite: Can I use PERUN PowerDesk without LARA-100 hardware? The answer is yes.
  • Page 7 PERUN Technologies User’s controller PERUN’s Expansion Boards LARA-100 PERUN PowerDesk SW Industrial Converter Figure 3: LARA-100 main components In the continuation of this document the focus is set to LARA-100 Motherboard. Power Electronics Research Unified Technologies www.perun-power.com...

  • Page 8: Lara 100 Motherboard

    PERUN Technologies 2 LARA 100 MOTHERBOARD LARA-100 MOTHERBOARD is a main board interfacing power electronics stage (Power Stage) and its controller (Controller Board). Making and putting together fully-functional power electronics devices opened for control development and testing, have never been easier!
  • Page 9 PERUN Technologies Figure 5: LARA 100 Motherboard connectors – upper side Power Electronics Research Unified Technologies www.perun-power.com...
  • Page 10 RS-232, RS-485, CAN or Ethernet, with just plugging suitable PERUN’s Communication Board. 2 – Application Board interface – Adapt the LARA-100 system to the specific power electronics application, using one of the PERUN’s Application Boards. Go ahead and work with motor drives, grid- connected converters or solar boost converters right away.
  • Page 11 7 – Controller Board interface – LARA-100 Motherboard has DIMM100 socket for connecting the power stage controller. This makes it plug-and-play compatible with wide range of Texas Instruments C2000 control cards.
  • Page 12 Controller on-board JTAG programmer/debugger To make your control prototyping experience as convenient as possible, LARA-100 Motherboard has built-in XDS100 v1 JTAG programmer/debugger. User can use standard programming/debugging environment, such as Texas Instruments Code Composer Studio, or directly program and debug his controller with PERUN PowerDesk software.
  • Page 13 It’s project-organized easy-to-use software environment used for configuration, monitoring and high-level control of whole LARA-100 system. It’s special features are Scope function allowing user to monitor any of controller’s real-time variables and Tag Explorer for setting control variables and parameters reference values, turning the PERUN PowerDesk into ideal platform for high-level debugging of power electronics applications.
  • Page 14 There is no need for multitude of long wires connecting the controller and power stage units, controller is nicely packed locally where the power stage is, making the whole LARA-100 system much less sensitive to signal noise typical for power electronics devices switching nature. In that way, complete LARA-100 system have external layout as industrial drives, which is not usual case with open development platforms.
  • Page 15 PERUN Technologies Figure 10: LARA 100 Motherboard dimensions Following figures represent process of mounting Motherboard on the industrial power stage (only mechanical cover is shown). Power Electronics Research Unified Technologies www.perun-power.com...
  • Page 16 PERUN Technologies Figure 11: Power Stage cover box and LARA-100 Motherboard aligned for mounting – look from the left (upper figure). Power Stage cover box and mounted LARA-100 Motherboard – look from the front (bottom figure). Figure 12: Power Stage cover box and mounted LARA-100 Motherboard. Look from the top and bottom.
  • Page 17 PERUN Technologies Figure 13: Power Stage cover box and mounted LARA-100 Motherboard, ready for connection to Power Stage, LARA-100 Expansion Boards (GPIO, APP, COMM) and PC with PERUN PowerDesk software. Motherboard’s top side connectors are properly aligned with cover box holes, and at the bottom side there is a connector (J1) for Controller Board.
  • Page 18 PERUN Technologies Figure 14: Controller board connector (J1) A pin assignment of controller board connector is given in following table: Table 1: Pin assignment of controller board interface (J1) Signal Description N.C. Not used N.C. Not used N.C. Not used N.C.
  • Page 19 PERUN Technologies Signal Description Measured inverter line current IU DSP_IU/ADCIN-A0 Electronics ground reference Electronics ground reference Controller analog input B1 ADCIN-B1 Measured inverter line current IV DSP_IV/ADCIN-A1 Electronics ground reference Electronics ground reference ADCIN-B2 Controller analog input B2 DSP_IW/ADCIN-A2 Measured inverter line current IW...
  • Page 20 PERUN Technologies Signal Description GPIO-63/SCITX-C Controller GPIO or SCI pin DSP_GU/GPIO- PWM signal for upper switch phase U 00/EPWM-1A DSP_GX/GPIO- PWM signal for lower switch phase U 01/EPWM-1B DSP_GV/GPIO- PWM signal for upper switch phase V 02/EPWM-2A DSP_GY/GPIO- PWM signal for lower switch phase V...
  • Page 21 PERUN Technologies Signal Description GPIO-15/TZ-4/SCIRX-B Controller GPIO or TZ or SCI pin GPIO-14/TZ-3/SCITX-B Controller GPIO or TZ or SCI pin GPIO-24/ECAP- Controller GPIO or CAP or QEP pin 1/EQEPA-2 GPIO-25/ECAP- Controller GPIO or CAP or QEP pin 2/EQEPB-2 GPIO-26/ECAP-3/EQEPI- Controller GPIO or CAP or QEP pin...
  • Page 22 EMU0 Controller JTAG emulator input EMU0 For full utilization of PERUN’s LARA-100 system functions and features (with expansion boards), it is suggested to use TI DIMM100 Controller Boards. If custom Controller Boards are used follow pin functions given in this table: GPIO = general purpose inputs/outputs, PWM = pulse width modulator...
  • Page 23 PERUN Technologies A pin assignment of power stage connector is given in following table: Table 2: Pin assignment of power stage connector (J2) Signal Description PWM_U PWM signal for phase-U upper IGBT gate driver in Power Stage three-phase inverter. It is +5 V active low digital signal.
  • Page 24 PERUN Technologies Signal Description ERR_ACK Error acknowledgment signal. It is +5 V active low digital signal. FDB_T Digital feedback signal providing the state of Power Stage three-phase diode rectifier phase-T input voltage. It is +5 V active low signal. CMD_BR Turn ON/OFF signal for Power Stage braking chopper circuit.
  • Page 25 PERUN Technologies Signal Description voltage signal. Gain of measurement circuit is fixed ?0C/?V. FDB_IV Analog feedback signal providing measured value of Power Stage three-phase inverter phase-V output current. This pin accepts analog -10 V – 10 V voltage signal. Gain of...
  • Page 26 I2C digital-to-analog converters for voltage and current analog outputs, and isolation circuits between user and controller sides. Moreover, PWM and measurement feedback signals are available on GPIO connector allowing connection of two LARA-100 converters in back-to-back configuration through specialized GPIO Board.
  • Page 27 PERUN Technologies Pin assignments of GPIO Board connector related to the Controller Board (TI DIMM100 controlCards) is given in following table: Table 3: Pin assignment of GPIO board connector (J1) Signal Description Ground reference for GPIO Board power supply (+3.3V, +5V, -15V, and +15V).
  • Page 28 PERUN Technologies Signal Description input/output GPIO-61. DSP_VDC/ADCIN-A3 By default, this pin features measured and conditioned signal (0-3V) of Power Stage DC bus voltage which is also directly connected to the Controller Board analog input ADCIN-A3. GPIO-63/SCITX-C Pin directly connected to Controller Board general purpose input/output GPIO-63.
  • Page 29 PERUN Technologies Signal Description 04/EPWM-3A for switching Power Stage phase-W upper IGBT transistor and which is directly connected to the Controller Board PWM output GPIO-04/EPWM-3A. GPIO-09/EPWM-5B Pin directly connected to Controller Board general purpose input/output GPIO-09. On some GPIO Boards this pin function as PWM output (e.g.
  • Page 30 PERUN Technologies Signal Description GPIO-24/ECAP- Pin directly connected to Controller Board general purpose 1/EQEPA-2 input/output GPIO-24. On some GPIO Boards this pin function as capture (CAP) or quadrature encoder (QEP) input. GPIO-27/ECAP- Pin directly connected to Controller Board general purpose 4/EQEPS-2 input/output GPIO-24.
  • Page 31 I2C bus data (SDA) pin. ERR_RST_GPIO Digital input dedicated for acknowledging and clearing LARA-100 system error state through GPIO Board (e.g. with connected switch button). Low 0V signal on this pin will reset error signal and enable PWM signals Motherboard.
  • Page 32 (Samtec TW-14-07-F-D-350-SM-000: 2 row, 2 mm pitch, flexible board stacker) for connection with PERUN’s Application Boards. Through this connector and Application Board user can adapt his LARA-100 system to specific power electronics application. Either it is a motor drive or PV boost converter or grid-connected converter user can transform his LARA-100 system simply by adding or replacing the Application Board.
  • Page 33 PERUN Technologies Pin assignments of Application Board connector related to the Controller Board (TI DIMM100 controlCards) is given in following table: Table 4: Pin assignment of application board connector (J4) Signal Description Ground reference for Application Board power supply (+3.3V, +5V, -15V, and +15V).
  • Page 34 PERUN Technologies Signal Description function as SPI bus SOMI/MISO pin for communication with specific on-board circuits. GPIO-24/ECAP- Pin directly connected to Controller Board general purpose 1/EQEPA-2 input/output GPIO-24. On some Application Boards this pin functions as capture input (CAP) or as quadrature encoder input (QEPA), mainly for connection with motor speed sensors like encoders.
  • Page 35 PERUN Technologies Signal Description PowerDesk software through Motherboard connection. GPIO-32/I2CSDA Pin directly connected to Controller Board general purpose input/output GPIO-32. On some Application Boards this pin function as I2C bus SDA clock pin for communication with specific on-board circuits. +3.3V +3.3V power supply for digital circuits on Application...
  • Page 36 Ethernet, CAN, RS-485, RS-232, USB/UART, or JTAG. Two or more LARA-100 systems, each with its own controller, can be connected through appropriate communication link for building more complex converter systems. For example, for building PV inverter...
  • Page 37 PERUN Technologies Signal Description this pin can function as SPI bus SIMO/MOSI pin or CAN bus transmit (TX) pin. GPIO-63/SCITX-C Pin directly connected to Controller Board general purpose input/output GPIO-63. On some Communication Boards this pin function as serial communication interface (SCI) transmit (TX) pin.
  • Page 38 PERUN Technologies Signal Description JTAG_TDI Pin connected to Controller Board JTAG interface TDI pin. JTAG_TMS Pin connected to Controller Board JTAG interface TMS pin. JTAG_TRSTn Pin connected to Controller Board JTAG interface TRSTn pin. JTAG_TDO Pin connected to Controller Board JTAG interface TDO pin.
  • Page 39 PERUN Technologies Connections – USB connector (J6) and +24V Isolated Power Supply connector (J10) USB connector (J6) – LARA-100 Motherboard has standard USB-B 4-pin receptacle connector (TE Connectivity part number: 5787834-1) connection with PERUN PowerDesk software. On- board USB to UART/I2C/JTAG bridge circuit allows...

  • Page 40: Technical Data

    PERUN Technologies TECHNICAL DATA General technical data are given in the following table: Table 6: Technical data – general overview Feature Value Nominal operating voltage for +5 VDC (+4.8…+5.2 VDC) digital circuits +5V (J2-35,36,37,38) Nominal operating voltage for J2-39 = +15 VDC (+14…+16 VDC) analog circuits ±15V (J2-39, 40)
  • Page 41 PERUN Technologies Feature Value interfaces) PWM outputs @J1 Controller interface: +3.3 VDC @J2 Power Stage interface: +5 VDC @J3 GPIO interface: +3.3 VDC Protection/error inputs and @J1 Controller interface: +3.3 VDC outputs @J2 Power Stage interface: +5 VDC @J3 GPIO interface: +3.3 VDC @J4 APP interface: +3.3 VDC...
  • Page 42 PERUN Technologies Figure 23: Interface overview of LARA-100 Motherboard Figure 24: Interface overview of LARA-100 Motherboard installed into Power Stage cover Power Electronics Research Unified Technologies www.perun-power.com...

  • Page 43: Pwm Outputs Circuit

    PERUN Technologies 3.1 PWM OUTPUTS CIRCUIT +3V3 +3V3 /BUFF_EN /BUFF_EN J2 pin J2 pin J1 pin J1 pin CMD_Gx CMD_Gx DSP_Gx DSP_Gx Figure 25: PWM outputs circuit (shown for one PWM output) – functional overview DSP_Gx are controller PWM outputs at J1 Controller Board interface (x = U, X, V, Y, W, Z).

  • Page 44: Protection Logic - Error Signal Generation Circuit

    PERUN Technologies 3.2 P – ROTECTION LOGIC ERROR SIGNAL GENERATION CIRCUIT +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 J2-pin 65 J2-pin 65 /ERR_MAN /ERR_MAN /ERR_MAN /ERR /ERR /ERR_APP /ERR_APP /ERR_APP /ERR_PWR /ERR_PWR /ERR_PWR ERR/GPIO-12/TZ-1 ERR/GPIO-12/TZ-1 /ERR_OT /ERR_OT /ERR_OT +3V3...
  • Page 45 PERUN Technologies The different statuses that arise during the LARA-100 system operation are indicated by means of the LEDs on the Motherboard.  If an error occurs, PWM pulses (IGBTs gate drive signals) are inhibited and the cause is indicated accordingly via the LEDs.
  • Page 46 PERUN Technologies Status Signal / Value ERR2 ERR1 ERR0 Error occurred due to the Power Stage inverter’s output currents above limits. Current limits are set by:  Power Stage original current rating (2.5 x amplitude of nominal current) Overcurrent error ...
  • Page 47 PERUN Technologies In error state PWM pulses are inhibited and Power Stage is not ready for operation. In order to allow PWM pulses and Power Stage operation, controller have to first acknowledge error through Controller Board interface J1-pin 36 (ERR_RST_DSP/GPIO-59).

  • Page 48: Overcurrent Protection Circuit

    PERUN Technologies 3.3 O VERCURRENT PROTECTION CIRCUIT +3V3 +3V3 +3V_REF +3V_REF +3V3 +3V3 /ERR_OC /ERR_OC “DSP_IU” “DSP_IU” 470p 470p from current from current meas. circuit meas. circuit (±I (±I to 0...3 V) to 0...3 V) from “DSP_IV” from “DSP_IV” comparators comparators from “DSP_IW”...
  • Page 49 PERUN Technologies o Example: for considered 5.5 kW industrial converter, nominal inverter output current value is 12 Arms. Nominal current amplitude is 1.41 x 12 = 16.92 A. Therefore, fixed overcurrent limit values are ±2.5 x 16.92 A = 42.3 A. This value assures safe operation of Power Stage.

  • Page 50: Dc-Link Under/Overvoltage Protection Circuit

    PERUN Technologies 3.4 DC- LINK UNDER OVERVOLTAGE PROTECTION CIRCUIT from Power Stage from Power Stage J2-pin 23 J2-pin 23 overvoltage circuit overvoltage circuit +3V3 +3V3 ERR_VDC ERR_VDC +3V_REF +3V_REF +3V3 +3V3 /ERR_OV /ERR_OV 470p 470p “DSP_VDC” “DSP_VDC” +3V3 +3V3 from voltage from voltage meas.
  • Page 51 PERUN Technologies DC-link undervoltage error signal /ERR_UV is generated by comparing measured DC-link voltage signal “DSP_VDC” (see section “DC-link voltage measurement circuit”) and reference undervoltage limit defined at integrated DAC (digital-to-analog) circuit output. By default, actual (Power Stage) DC-link undervoltage limit is set to 300 V, but different value can be specified in purchasing process.

  • Page 52: Manual Error Trigger Circuit

    PERUN Technologies 3.5 M ANUAL ERROR TRIGGER CIRCUIT +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 /ERR_GPIO /ERR_GPIO J3-pin 46 J3-pin 46 /ERR_MAN /ERR_MAN /ERR_DSP / GPIO-13 /ERR_DSP / GPIO-13 J1-pin 66 J1-pin 66 to “Protection to “Protection +5V_USB +5V_USB...

  • Page 53: Error Signal Reset Circuit

    /PWM_EN/GPIO-49 /PWM_EN/GPIO-49 Figure 30: Error reset circuit – functional overview There are three sources of error reset signal (/ERR_RESET) for clearing LARA-100 system error state:  /ERR_RST_GPIO - GPIO Board external error reset input. Every GPIO Board has dedicated digital input for resetting LARA-100 system error state.

  • Page 54: Pwm Pulses Enable Circuit

    PERUN Technologies 3.7 PWM PULSES ENABLE CIRCUIT +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 jumper jumper /PWM_EN/GPIO-49 /PWM_EN/GPIO-49 jumper jumper J1-pin 60 J1-pin 60 /ERR /ERR jumper jumper /BUFF_EN /BUFF_EN /ERR_RESET /ERR_RESET PWM outputs PWM outputs circuit circuit +3V3...

  • Page 55: Current Measurement Circuit

    Figure 32: Current measurement circuit (shown for phase U current - IU) – functional overview For all inverter output currents IU, IV, and IW there are an identical measurement circuit on LARA-100 Motherboard. Instead J2-pin 30 FDB_IU feedback signal from Power Stage, for other two currents there are: ...
  • Page 56 PPD configuration software component. Using this feature, user can set desired current measurement gains (and current range/limits by that way) and fully adapt the same LARA-100 system to different loads/sources. However, this feature is not available in LARA-100 Motherboard v1.3 revision.

  • Page 57: Dc-Link Voltage Measurement Circuit

    Using this feature, user will be able to set desired voltage measurement gain (and DC-link voltage limits by that way) and fully adapt the same LARA-100 system to different voltage levels (i.e. to low and high voltage applications, from 48 V to 800 V DC-link voltage).
  • Page 58 150 V to 800 V. In that way it represents suitable solution for applications where DC-link voltage is above 300 V. For low voltage applications, user has to consider use of PERUN’s LARA-100 optional Power Supply and DC-link Measurement Board which properly operates with lower DC-link voltages and extends measurement range of actual DC-link voltage up to 0 V.

  • Page 59: Pre-Charge Thyristor And Braking Chopper Turn On/Off Circuit

    PERUN Technologies 3.10 CHARGE THYRISTOR AND BRAKING CHOPPER TURN OFF CIRCUIT +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 Jumper Jumper /PWM_EN/GPIO-49 /PWM_EN/GPIO-49 jumper jumper J1-pin 60 J1-pin 60 /THY_BR_EN /THY_BR_EN /ERR /ERR jumper jumper /ERR_RESET /ERR_RESET Precharge thyristor and braking...
  • Page 60 Time interval is defined by integrated RC circuit, and it equals up to 5 seconds. After time delay elapses, pre-charge thyristor is automatically turned-on and stays in that state until power is removed from LARA-100 system.  Controller Board control – Pre-charge thyrsitor can be managed by implemented control code through Controller Board interface J1-pin 44 GPIO-63 signal.

  • Page 61: Communication Circuits

    PERUN Technologies 3.11 OMMUNICATION CIRCUITS +3V3 +3V3 * filtered * filtered +5V_USB +5V_USB +3V3 +3V3 330Ω@100MHz 330Ω@100MHz USB hub USB hub USB isolator USB isolator VBUS1 VBUS1 VBUS2 VBUS2 UPSTREAM UPSTREAM USBDM_UP USBDM_UP USBDP_UP USBDP_UP VBUS VBUS DOWNSTREAM1 DOWNSTREAM1 USBDN1_N...
  • Page 62 Code Composer Studio for Texas Instruments microcontrollers), even it can be used directly with PERUN PowerDesk (e.g. for downloading control code). PERUN PowerDesk (PPD) software is using J6 USB interface for monitoring and control of LARA-100 system operational states. GPIO interface of integrated USB bridge circuit (FT4232H) is used for this purpose.
  • Page 63 PPD software suite. All Motherboard’s configuration data which are pre-set during manufacturing process (factory settings) are stored on the EEPROM memory belonging to LARA-100 config/monitor USB bridge circuit. PPD uses the EEPROM data for automatic detection and validation of LARA-100 Motherboard.

  • Page 64: Power Supply Circuits

    PERUN Technologies 3.12 OWER UPPLY CIRCUITS * to Motherboard * to Motherboard * to Motherboard 10uH/2.4A 10uH/2.4A 10uH/2.4A 390Ω@100MHz/2A 390Ω@100MHz/2A 390Ω@100MHz/2A * from Power Stage * from Power Stage * from Power Stage 0R jumpers 0R jumpers 0R jumpers digital circuits...
  • Page 65 PERUN Technologies Note Digital (DGND) and analog ground planes (AGND) on Motherboard are routed separately to assure less interference between digital and analog circuits. Special care is done in PCB design to provide good quality of analog feedback (measurement) signals with reduced noise. However, by default they are connected at appropriate positions making unique ground reference GND.

  • Page 66: Connection Examples

    PERUN Technologies 4 CONNECTION EXAMPLES Figure 37: Schematic structure of LARA-100 system – general overview of connections between Motherboard and other components Power Electronics Research Unified Technologies www.perun-power.com...
  • Page 67 PERUN Technologies Figure 38: Schematic structure of LARA-100 grid-connected converter system - LARA-100 GCC Power Electronics Research Unified Technologies www.perun-power.com...
  • Page 68 PERUN Technologies Figure 39: Schematic structure of LARA-100 motor drive system - LARA-100 MD Power Electronics Research Unified Technologies www.perun-power.com...

  • Page 69: Document History

    PERUN Technologies DOCUMENT HISTORY Date Version Responsible person Revision details 2017-03-09 Power Electronics Research Unified Technologies www.perun-power.com...

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