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Samsung MP-200 Service Manual
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Samsung MP-200 Service Manual

Samsung MP-200 Service Manual

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SERVICE

MP3 PLAYER

MP3 PLAYER
MP-200
Manual
4. PCB Diagrams
CONTENTS

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Summary of Contents for Samsung MP-200

  • Page 1: Table Of Contents

    MP3 PLAYER MP-200 SERVICE Manual MP3 PLAYER CONTENTS 1. Exploded Views and Parts List 2. Electrical Parts List 3. Block Diagrams 4. PCB Diagrams 5. Wiring Diagram 6. Schematic Diagrams 7. IC Internal Diagram 8. Reference Information...
  • Page 2 ELECTRONICS © Samsung Electronics Co.,Ltd. SEP. 2000 Printed in Korea Code no. AH68-00036G...

  • Page 3: Exploded Views And Parts List

    1. Exploded View and Parts List 1-1 Total Exploded Samsung Electronics...
  • Page 4 SPRING-BATTERY(A) ; SUS304,Φ0.5,Au-P AH61-00419A SPRING-BATTERY(B) ; SUS304,Φ0.5,Au-P AH61-00420A SPRING-BATTERY(C) ; SUS304,Φ0.5,Au-P AH69-00241A CUSHION-LCD,A ; PORON T0.3,BLK AH69-00242A CUSHION-LCD,B ; EVA T1.0,BLK AH64-00689A KNOB-HOLD ; POM,D/GRAY 6003-001162 SCREW TAP TITE ; 1.4X4 Cr-P 6003-001152 SCREW TAP TITE ; 1.4X3 Ni-P Samsung Electronics...

  • Page 5: Electrical Parts List

    2SB1197K,PNP,200MW,SOT-23,TP,8 3404-001121 SWITCH-TACT SKQRAAE,G4162462M 0504-000127 TR-DIGITAL KSR1102,NPN 200MW 10KOHM SOT23 3404-001121 SWITCH-TACT SKQRAAE,G4162462M 0504-000127 TR-DIGITAL KSR1102,NPN 200MW 10KOHM SOT23 3710-001601 CONNECTOR-SOCKET 40P,2R,0.5MM,SMD-S-AUF 0505-001426 FET-SILICON IRLML6401,P,-12V,-4.3A,0.05OHM AH07-00025A DISPLAY LCD -,WD-S3602V-1YNNA,MY-MP20,- 1002-001174 IC-D/A CONVERTER DAC3550A-C2 ,PLASITC,5.25V, 1203-001597 IC-DC/DC CONVERTER MAX1676EUB-T,SOP,10P, Samsung Electronics...

  • Page 6: Block Diagrams

    3. Block Diagram 3-1 Main Samsung Electronics...
  • Page 7 4. Printed Circuit Board Diagram 4-1 LCD Top View Bottom View 4-2 SMC Top View Bottom View Samsung Electronics...

  • Page 8: Wiring Diagram

    5. Wiring Diagram Samsung Electronics...

  • Page 9: Schematic Diagrams

    6. Schematic Diagram 6-1 LCD Samsung Electronics...
  • Page 10 6-2 SMC Samsung Electronics...

  • Page 11: Ic Internal Diagram

    Ground (0 V) 18, 17, 16, 15, NOTES: to B Data inputs/outputs 14, 13, 12, 11 HIGH voltage level LOW voltage level Output enable input (active LOW) don’t care Positive supply voltage high impedance OFF-state 1998 Apr 20 853–1931 19258 Samsung Electronics...
  • Page 12 IC Internal Diagram Philips Semiconductors Product specification Octal bus transceiver (3-State) 74LV245 PIN CONFIGURATION LOGIC SYMBOL SV00624 LOGIC SYMBOL (IEEE/IEC) 3EN1 3EN2 SV00625 SV00626 1998 Apr 20 Samsung Electronics...
  • Page 13 SOT163-1 20-Pin Plastic SSOP Type II –40°C to +125°C 74LV244 DB 74LV244 DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +125°C 74LV244 PW 74LV244PW DH SOT360-1 PIN CONFIGURATION LOGIC SYMBOL SV00621 SV00620 1998 May 20 853–1924 19420 Samsung Electronics...
  • Page 14 18, 16, 14, 12 to 1Y Bus outputs Output enable input (active LOW) Positive supply voltage LOGIC SYMBOL (IEEE/IEC) SV00622 FUNCTION TABLE INPUTS OUTPUT NOTES: HIGH voltage level LOW voltage level don’t care SV00666 high impedance OFF-state 1998 May 20 Samsung Electronics...
  • Page 15 Fig. 1–1: Block diagram of the DAC 3550A demand signal line out Host MPEG clock 3550A (PC, Controller) 3507D MPEG bit stream 14.725 MHz ROM, CD-ROM, CLKOUT RAM, Flash Mem. .. Fig. 1–2: Typical application: MPEG Layer 3 Player MICRONAS INTERMETALL Samsung Electronics...
  • Page 16 AUX1R Input Select Switch Matrix AUX1L AUX2R DEEMR DEEML Postfilter Op Amps FOPL FOPR Deemphasis Op Amps FOUTR FOUTL Line-Out FINL FINR Analog Volume Headphone Amplifier OUTL OUTR Fig. 1–3: Block diagram of the DAC 3550A MICRONAS INTERMETALL Samsung Electronics...
  • Page 17 31 30 programmable delay bit right 32-bit audio sample left 32-bit audio sample Fig. 2–2: I S 32-bit mode (LR_SEL=0) Note: Volume mute should be applied before changing S mode in order to avoid audible clicks. MICRONAS INTERMETALL Samsung Electronics...
  • Page 18 This technique results in extremely low quantization noise in the audio band. 2.5. Analog Low-pass The analog low-pass is a first order filter with a cut-off frequency of approximately 1.4 MHz which removes the high-frequency components of the noise-shaping signal. MICRONAS INTERMETALL Samsung Electronics...
  • Page 19 Please note, that if a speaker is connected, it should − 75 000001 strictly be connected as shown in Fig. 2–5. Never use a separate connector for the speaker, because electro- Mute 000000 static discharge could damage the output transistors. MICRONAS INTERMETALL Samsung Electronics...
  • Page 20 As in standard mode, the sample rate detection allows a tolerance of ± 200 ppm at WSI. Subaddressing is not possible in MPEG mode; this means, in multi-DAC systems, only one DAC 3550A can run in MPEG mode. MICRONAS INTERMETALL 7-10 Samsung Electronics...
  • Page 21 MAS 3507D CLKI Clock DC/DC Synthesizer Converter CLKO decoded output Serial Out RISC DSP Core /8+5/ MPEG 1/2 serial control audio bit stream Serial In MPEG frame sync CRC error Fig. 1–1: MAS 3507D block diagram Micronas Samsung Electronics 7-11...
  • Page 22 Fig. 1–2: Block diagram of a MAS 3507D, decoding a stored bit stream in multimedia mode control I 14.725 MHz L3 bit stream line out Receiver (fixed rate) MAS 3507D 3550A Front-end clock CLKOUT CLKI Fig. 1–3: Block diagram of a MAS 3507D in a broadcast environment Micronas 7-12 Samsung Electronics...
  • Page 23 MAS 3507D in serial input mode. MPEG Bit Stream Ancillary Sync Data Volume to µC Digital Audio Output Decoder MPEG Tone Status Decoder Control Config. Reg. Status Start-up Config. Fig. 2–1: Block diagram of the MPEG Decoder in serial input mode Micronas Samsung Electronics 7-13...
  • Page 24 PI15 CLKI VSENS PI14 AVSS DCSO PI13 10 11 18 19 20 21 22 23 24 25 26 27 28 PI12 DCSG I2CC I2CD DCEN XVSS XVDD Fig. 4–4: 44-pin PLCC package Fig. 4–5: 44-pin PMQFP package 7-14 Samsung Electronics...
  • Page 25 MAX1675 LOW-BATTERY LOW-BATTERY MAX1676 DETECT IN DETECT OUT CLSEL BATT 0.1 µ F SHDN µMAX ________________________________________________________________ Maxim Integrated Products For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468. Samsung Electronics 7-15...
  • Page 26 Internal NFET, PFET Ω = 100mA DS(ON) On-Resistance MAX1674, MAX1676 (CLSEL = OUT) 0.80 1.20 LX Switch Current Limit (NFET) MAX1675, MAX1676 (CLSEL = GND) 0.65 LX Leakage Current = 0, 5.5V; V = 5.5V 0.05 µA LEAK _______________________________________________________________________________________ 7-16 Samsung Electronics...
  • Page 27 = 1V, V = 3.3V µs LX Switch Off-Time = 1V, V = 3.3V 0.75 1.25 µs MAX1674, MAX1676 (CLSEL = OUT) 0.75 1.25 LX Switch Current Limit (NFET) MAX1675, MAX1676 (CLSEL = GND) 0.36 0.69 _______________________________________________________________________________________ Samsung Electronics 7-17...
  • Page 28 (2.4 to 3.6 V) 5V mask ROM version MSM66573-TB (4.5 to 5.5 V) 100-pin plastic TQFP MSM66573L flash ROM MSM66Q573L-TB (TQFP 100-P-1414-0.50-K) version MSM66573 flash ROM MSM66Q573-TB version MSM66573 OTP ROM MSM66P573-TB version (2.7 to 5.5 V) 1/28 7-18 Samsung Electronics...
  • Page 29 Non-maskable × 1ch External interrupt Maskable × 6ch Interrrupt priority 3 levels Separate address and data busses Others Bus release function Dual clocks OTP ROM version MSM66P573 (Max. f = 24 MHz) Flash ROM version MSM66Q573L MSM66Q573 2/28 Samsung Electronics 7-19...
  • Page 30 8. Wide support for external interrupts There are a total of seven interrupt channels for use in communicating with external devices: six for maskable interrupts and one for non-maskable interrupts. 3/28 7-20 Samsung Electronics...
  • Page 31 RAM 4K ROM 64K 8 bit Timer6/WDT WAIT PWMOUT0 8 bit PWM0 PWMOUT2 PWMOUT1 8 bit PWM1 PWMOUT3 TM9OUT 8 bit Timer9 TM9EVT CPCM0 CAP/CMP CPCM1 16 bit FRC 10 bit A/D AGND Converter Interrupt EXINT0 EXINT5 4/28 Samsung Electronics 7-21...
  • Page 32 P1-1/A9 TM4OUT/P8-4 P1-0/A8 PWM2OUT/P8-6 P4-7/A7 PWM3OUT/P8-7 P4-6/A6 PWM0OUT/P7-6 P4-5/A5 PWM1OUT/P7-7 P4-4/A4 P4-3/A3 P4-2/A2 HLDACK/P9-7 P4-1/A1 EXINT4/P9-0 P4-0/A0 EXINT5/P9-1 P9-2 P0-7/D7 P9-3 P0-6/D6 EXINT0/P6-0 P0-5/D5 EXINT1/P6-1 P0-4/D4 EXINT2/P6-2 P0-3/D3 EXINT3/P6-3 P0-2/D2 P6-4 P0-1/D1 P6-5 P0-0/D0 100-pin Plastic TQFP 7-22 Samsung Electronics...
  • Page 33 1:24. For the use of low bit-rate audio coding schemes in broadcast applications at bitrates of 60 kbit/s per audio channel, the ITU-R recommends MPEG Layer-3. (ITU-R doc. BS.1115) Samsung Electronics...

  • Page 34: Reference Information

    Thus is called noiseless coding because no noise is added to the audio signal. The process to find the optimum gain and scalefactors for a given block, bit-rate and output from the perceptual model is usually done by two nested iteration loops in an analysis-by-synthesis way: Samsung Electronics...
  • Page 35 In other words, the rate loop is nested within the noise control loop. The outer (noise control) loop is executed until the actual noise (computed from the difference of the original spectral values minus the quantized spectral values) is below the masking threshold for every scalefactor band (i.e. critical band). Samsung Electronics...