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BD-HP17U
[4] MAIN (4) CIRCUIT SCHEMATIC DIAGRAM
CLKGEN(MAIN Sht004)
J
TO POWER
D_3.3V
D_GND
I
H
G
F
E
TO EMMA3P
CLKG_27M
D
CLKG_30M
CLKG_25M
C
TO ETHER
CLKG_50M
B
A
1
2
3
4
FB8701
A021WJ
C8701
PWB
220u
6.3V
X8701
ASH
SCA192WJQZ
R8703
0
CY
R8702
1M
27MHz
USB CLK :30MHz
PCI CLK : 25MHz
5
6
7
8
9
R8706
50MHz
22
8
7
6
5
30M
50M
27M
Vss
IC8701
SL1530CT
VDD
XOUt
XIN
NC
1
2
3
4
10
11
12
13
7 – 4
14
15
16
17
NOT USE
18
19
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