Sony PLM-S700E Service Manual page 64

• MA-324 BOARD IC302 CXA3106Q (PLL)
Pin No. Pin Name
1 IOVCC
2 IOGND
3 VCOH
4 VCOL
5 VCO
6 HOLD
7 SYNCH
8 SYNCL
9 SYNC
10 SENABLE
11 SCLK
12 SDATA
13 TLOAD
14 CS
15 SEROUT
16 DIVOUT
17 UNLOCK
18 DVCC
19 DGND
20 CLK/2N
21 CLK/2
22 CLKN
23 CLK
24 DSYNC
25 TTLGND
26 TTLVCC
27 IOGND
28 PECLVCC
29 CLK/2L
30 CLK/2H
31 CLKL
32 CLKH
33 DSYNCL
34 DSYNCH
35 VBB
36 PECLVCC
37 IOGND
38 IOVCC
39 PLLVCC
40 PLLGND
41 VCOVCC
42 VCOGND
43 VCOHGND
44 IREF
45 RC2
I/O
—
Power supply terminal (+5V) (digital system)
—
Ground terminal (digital system)
I External VCO input terminal Not used (open)
I
External inverted VCO input terminal Not used (open)
I
External VCO input terminal Not used (open)
I
Phase comparison disable signal input terminal Not used (fixed at "L")
I Sync signal input terminal Not used (open)
I
Inverted sync signal input terminal Not used (open)
I
Horizontal sync signal input terminal
I
Enable signal input from the system controller (IC501)
I
Serial data transfer clock signal input from the system controller (IC501)
I
Serial data input from the system controller (IC501)
I
Programmable counter test input terminal Not used (fixed at "H")
I Chip select signal input terminal Not used (fixed at "H")
O
Register read output terminal Not used (open)
O
Programmable counter test output terminal Not used (open)
O
Unlock signal output terminal Not used (open)
— Power supply terminal (+5V) (digital system)
—
Ground terminal (digital system)
O
Inverted 1/2 clock signal output terminal Not used (open)
O
1/2 clock signal output terminal Not used (open)
O
Inverted clock signal output terminal Not used (open)
Clock signal output to the LCD timing generator (IC301) and on screen display controller
O
(IC401)
O
Delay sync signal output to the LCD timing generator (IC301)
—
Ground terminal (for TTL output)
—
Power supply terminal (+5V) (for TTL output)
— Ground terminal (digital system)
—
Power supply terminal (+5V) (for PECL output)
O
Inverted 1/2 clock signal output terminal Not used (pull-up)
O
1/2 clock signal output terminal Not used (pull-up)
O
Inverted clock signal output to the LCD drive IC (IC202 to 204)
O
Clock signal output to the LCD drive IC (IC202 to 204)
O
Delay sync signal output terminal Not used (pull-up)
O Inverted delay sync signal output terminal Not used (pull-up)
O
Reference voltage output for the PECL Not used (open)
—
Power supply terminal (+5V) (for PECL output)
—
Ground terminal (digital system)
— Power supply terminal (+5V) (digital system)
—
Power supply terminal (+5V) (for PLL circuit/analog system)
—
Ground terminal (for PLL circuit/analog system)
—
Power supply terminal (+5V) (for VCO circuit/analog system)
—
Ground terminal (for VCO circuit/analog system)
—
Ground terminal (for VCO sub/analog system)
—
Charge pump current generating terminal
— Connection terminal of low-pass filter for the charge pump
Function
4-91