Samsung SGH-P960 Service Manual page 93

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SAMSUNG CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
A
EXCEPT AS AUTHORIZED BY SAMSUNG.
D18
TCXO_OUT
TCXO
A9
USB_XTAL48_IN
B9
USB_XTAL48_OUT
A15
B
SLEEP_XTAL_IN
SLEEP_XTAL_IN
B15
SLEEP_XTAL_OUT
VREG_MSMP_2.6V
C24
RESERVED
G13
RESET_N
RESIN_N
G12
RESOUT_N
RESOUT_N
W5
WDOG
RESOUT_N_EBI1
RESOUT_N_EBI1
VREG_MSME_1.8V
AD15
WDOG_EN
G24
KEY_LED_EN
WDOG_STB|GPIO_0|SBCK1
VREG_MSMP_2.6V
R300
R22
MODE2
T22
R301
MODE1
Y21
MODE0
R302
AC2
BOOT_MODE3
AD20
BOOT_MODE2
AD19
BOOT_MODE1
R303
L2
C
SDRAM_DQM(0)
LB1_N|SDRAM1_DQM0
L4
SDRAM_DQM(1)
UB1_N|SDRAM1_DQM1
R8
R307
SDRAM_WE_N
WE1_N|SDRAM1_WE_N
V2
OE1_N|SDRAM_CLK_EN2
T8
SDRAM_DQM(3)
A1_25|GPIO75|SDRAM1_DQM3
V1
A1(0)
A1_24|GPIO79SDRAM1_A0
D1(31)
R7
A1_22|SDRAM1_D31
D1(30)
R4
A1_21|SDRAM1_D30
D1(29)
R5
A1_20|SDRAM1_D29
D1(28)
N8
A1_19|SDRAM1_D28
D1(27)
T2
A1_18|SDRAM1_D27
D1(26)
T1
A1_17|SDRAM1_D26
D1(25)
P5
A1_16|SDRAM1_D25
D1(24)
P4
A1_15|SDRAM1_D24
M8
SDRAM_BA1
A1_14
P7
D1(24:31)
SDRAM_BA0
A1_13
A1(12)
N5
A1_12
A1(11)
P2
A1_11
A1(10)
P1
A1_10
A1(9)
N1
D
A1_9
A1(8)
N2
A1_8
A1(7)
N7
A1_7
A1(6)
M7
A1_6
A1(5)
M5
A1_5
A1(4)
L5
A1_4
A1(3)
L8
A1_3
A1(2)
L7
A1_2
A1(1)
L1
A1_1
W4
A1(1:12)
INTERRUPT_UL
XMEM1_CS_N3|GPIO77|SDRAM1_CS_N1
U5
SDRAM_CS
XMEM1_CS_N2|SDRAM1_CS_N0
Y1
TFLASH_DET
XMEM1_CS_N1|GPIO76
V4
XMEM1_CS_N0|SDRAM1_CS_N2
R311
AA1
SDRAM_CLK
ROM1_CLK|SDRAM1_CLK
G1
SDRAM_RAS_N
ROM1_ADV_N|SDRAM1_RAS_N
V5
XMEM1_HWAIT_N|SDRAM1_CLK_EN1
K8
SDRAM_CAS_N
XMEM1_LWAIT_N|SDRAM1_CAS_N
D1(16:23)
M4
SDRAM_CKE
SDRAM1_CLK_EN0
U4
E
D1(23)
SDRAM1_D23|GPIO74|EBI1_HUB_N
U7
D1(22)
SDRAM1_D22|GPIO73|EBI1_HLB_N
D1(21)
AA2
SDRAM1_D21|GPIO72
Y2
D1(20)
SDRAM1_D20|GPIO71
E1
D1(19)
SDRAM1_D19|GPIO70
P8
D1(18)
D1(0:15)
SDRAM1_D18|GPIO69
D1(17)
T4
SDRAM1_D17|GPIO68
D1(16)
T7
SDRAM1_D16|GPIO67
D1(15)
K4
SDRAM1_D15|D1_15
K7
D1(14)
SDRAM1_D14|D1_14
K5
D1(13)
SDRAM1_D13|D1_13
J1
D1(12)
SDRAM1_D12|D1_12
D1(11)
J5
SDRAM1_D11|D1_11
J2
D1(10)
SDRAM1_D10|D1_10
J4
D1(9)
SDRAM1_D9|D1_9
N4
D1(8)
SDRAM1_D8|D1_8
D1(7)
J7
SDRAM1_D7|D1_7
D1(6)
G2
SDRAM1_D6|D1_6
D1(5)
H5
SDRAM1_D5|D1_5
Y4
D1(4)
SDRAM1_D4|D1_4
E2
F
D1(3)
SDRAM1_D3|D1_3
Y5
D1(2)
SDRAM1_D2|D1_2
D1(1)
G4
SDRAM1_D1|D1_1
D1(0)
H4
SDRAM1_D0|D1_0
AE11
SH_RESETA_N
A2_20|GPIO34LCD_RSEBI2_HLB_N
AA14
A2(1:16)
A2_19|D217WAIT_N
V14
A2_18|D216ADV_N
AB13
A2_17
AD12
A2(16)
A2_16
W13
A2(15)
A2_15
AB12
A2(14)
A2_14
A2(13)
AA13
A2_13
A2(12)
AE10
A2_12
AD10
A2(11)
A2_11
AB11
A2(10)
A2_10
A2(9)
AA12
A2_9
A2(8)
W12
A2_8
A2(7)
V13
A2_7
AB10
A2(6)
VREG_MSME_1.8V
A2_6
AA11
A2(5)
G
A2_5
AB9
A2(4)
A2_4
A2(3)
V12
A2_3
A2(2)
AA9
A2_2
R318
A2(1)
AA10
A2_1
AD8
LB2_N|A2_0|NAND2_ALE
AE8
UB2_N|NAND2_CLE
V15
NANDFLASH_READY
NAND2_FLASH_READY|GPIO33|EBI2_PNAND_READY
AE12
JACK_INT
LCD_CS_N|GPIO38
R319
AD11
DVB_PWR_ON
LCD_EN|GPIO37|HUB_N
AA15
XMEM2_CS_N3|GPIO36
NANDFLASH_CS
W15
SH_CS_N
XMEM2_CS_N2|GPIO35
AB14
DVB_CS_N
XMEM2_CS_N1|NAND2_CS_N
W14
XMEM2_CS_N0|NAND1_CS_N
AE4
WE2_N
WE2_N
AE6
D2(0:15)
OE2_N
OE2_N|NAND2_RE_N
D2(15)
AA8
D2_15
AB8
D2(14)
D2_14
W11
D2(13)
H
D2_13
W10
D2(12)
D2_12
D2(11)
AD6
D2_11
D2(10)
AB7
D2_10
D2(9)
V11
D2_9
D2(8)
W9
D2_8
AA7
D2(7)
D2_7
AD4
D2(6)
D2_6
VREG_MSMP_2.6V
D2(5)
V10
D2_5
AB6
D2(4)
D2_4
AB5
D2(3)
D2_3
W8
D2(2)
D2_2
D2(1)
AD3
D2_1
D2(0)
AA6
D2_0
K25
R320
R321
R322
R323
R324
UART1_TX
UART1_DP_TX_DATA|GPIO95|NAND_BOOT_ERR
U21
KEYSENSE4_N|GPIO48|ETM_TRACE_PKT2
KEYSENSE(4)
P21
KEYSENSE(3)
KEYSENSE3_N|GPIO47|KYPD_7|ETM_TRACE_PKT1
D13
KEYSENSE(2)
KEYSENSE2_N|GPIO46|KYPD_5|ETM_TRACE_PKT0
P19
I
KEYSENSE(1)
KENSENSE1_N|GPIO63|KEYSENSE1_N|KYPD_3
R19
KEYSENSE(0)
KEYSENSE0_N|GPIO62|KYPD_1|ETM_PIPESTAT0
M18
SBST
RINGER|GPIO18|CAMIF_EN
VREG_MSMP_2.6V
H16
UART1_RFR
UART1_RFR_N|GPIO93|SBST1
R18
UART1_CTS
UART1_CTS_N|GPIO97
L22
UART1_DP_RX_DATA|GPIO96
C2
SIM_CLK
UART2_RFR_N|USIM_CLK|GPIO91
F4
SIM_RST
UART2_CTS_N|USIM_RESET|GPIO90
G5
CHG_EN_N
UART2_DP_RX_DATA|USIM_PWR_EN|GPIO89
F5
UART1_RX
SIM_IO
UART2_DP_TX_DATA|USIM_DATA|GPIO88
K24
CAM_FLASH_EN
UART3_RFR_N|GPIO87|TSIF_CLK
K22
CAM_PWR_ON1
UART3_CTS_N|GPIO86|TSIF_ENABLE|PM_SBDT
M21
RCV_SPK_SEL
UART3_DP_RX_DATA|GPIO85|TSIF_DATA|PM_SBST
M19
BT_UART_SEL
UART3_DP_TX_DATA|GPIO84|TSIF_ERROR|TSIF_NULL|TSIF_SYNC|PM_SBCK
M25
USB_DAT
USB_DAT_VP
N21
USB_SEO
USB_SE0_VM
M24
USB_OE_N
USB_OE_TP_N
J
L25
TFLASH_DATA(3)
SDCC_DAT3|GPIO101
L24
TFLASH_DATA(2)
SDCC_DAT2|GPIO100
K19
TFLASH_DATA(1)
SDCC_DAT1|GPIO99
E14
TFLASH_DATA(0)
SDCC_DAT0|GPIO32|MMC_DATA
L18
TFLASH_CLK
SDCC_CLK|GPIO31|MMC_CLK
G14
TFLASH_CMD
SDCC_CMD|GPIO30|MMC_CMD
P3H_HnppdPU
P3H_HnppdPU
P3H_HnppdPU
P3H_HnppdPU
P3H_HnppdPU
P3H_HnppdPU
K
VREG_MSMP_2.6V
R336
EAR_SW_EN
SAPA_TCXO_EN
R338
L
1
2
3
4
5
6
AI
AI
AO
P3_AI
P3_AO
P3_IS
P3_O
P1_O
P3_IS-PU
P3_npPDpu
P3_IS-PD
P3_npPDpu
PA_ON2|GPIO29|BM_INT|TSIF_SYNC
P3_IS-PD
P3_npPDpu
P3_IS-PD
P3_O
P3_Znppdpu
P1_IS
P3_Znppdpu
P3_IS
P3_nppdPU
P3_IS
P3_Znppdpu
P3_Znppdpu
P1_O
P1_O
P2_nppdPU
MDP_VSYNC_PRIMA_RY|GPIO105
P1_O
P2_nppdPU
MDP_VSYNC_SECON_DARY|GPIO104
P1_O
P1_npPDpu
P1_npPDpu
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P3_nppdPU
GPIO66|MONO_STEREO_HS_DET_N|ETM_TRACECLK
GPIO64|UART1_RI|ETM_PIPESTAT2
P1_B-K
P3_nppdPU
GPIO53|KYPD_17|ETM_TRACE_PKT7
P1_B-K
P3_nppdPU
P1_B-K
P3_nppdPU
GPIO52|KYPD_15|ETM_TRACE_PKT6
P1_B-K
P3_nppdPU
GPIO51|KYPD_13|ETM_TRACE_PKT5
P1_B-K
P3_nppdPU
GPIO50|KYPD_11|ETM_TRACE_PKT4
P1_B-K
P3_nppdPU
GPIO49|KYPD_9|ETM_TRACE_PKT3
P1_B-K
P3_npPDpu
GPIO45|KYPD_MEMO|ETM_TRACESYNC_B
P1_B-K
P3_nppdPU
GPIO44|UART1_DTR|ETM_PIPESTAT0B|GP_CLK
P1_B-K
P3_nppdPU
P1_B-K
P3_npPDpu
GPIO42|PS_HOLD|ETM_PIPESTAT2B
P1_B-K
P3_nppdPU
P1_B-K
P3_nppdPU
P1_B-K
P1_B-K
P1_O
P1_nppdPU
P1_O
P1_nppdPU
P1_O
P1_O
P1_O
P1_BS-PU
P1_BS-PU
P1_O
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
UCP300
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P1_B-K
P2_npPDpu
P2_B
P2_B
P2_O
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_B
P2_O
P2_O
P2_nppdPU
P2_nppdPU
P2_npPDpu
P2_nppdPU
P2_nppdPU
P2_O
P2_O
P2_O
P2_O
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P2_B-K
P3_npPDpu
P3_nppdPU
P3_nppdPU
P3_nppdPU
P3_nppdPU
P3_nppdPU
P3_npPDpu
P3_nppdPU
P3_npPDpu
P3_npPDpu
P4H_HnpPDpu
P4H_HnpPDpu
P4H_HnpPDpu
P4H_HnpPDpu
P4H_HnpPDpu
P4H_HnpPDpu
P4H_HnpPDpu
P3_B-K
P4H_HnpPDpu
P3_B-K
P3_B-K
VREG_MSMP_2.6V
R341
C359
Place near pin AA22
4
5
6
7
8
9
< MODEM >
E11
P3_O
TX_ON|GRFC10
RF_ON_TX_ON
D6
P3_npPDpu
GPIO12|GRFC9
E7
P3_npPDpu
GPIO11|GRFC8
GSM_ANT_SEL2_N
P22
P3_npPDpu
GPIO10|GRFC7
GSM_ANT_SEL1_N
T21
P3_npPDpu
GPIO9|GRFC6
GSM_ANT_SEL0_N
E10
P3_npPDpu
GPIO6|GRFC3
MCAM_EN
VREG_MSMA_2.6V
D9
P3_npPDpu
GPIO5|GRFC2
CAM_FLASH_MODE
B7
P3_npPDpu
GPIO3|GRFC0
VCAM_RESET_N
C300
B11
P3_AO
I_OUT
TX_IP
B12
Place between D12 and F12
P3_AO
I_OUT_N
TX_IM
A12
P3_AO
Q_OUT
TX_QP
A11
P3_AO
Q_OUT_N
TX_QM
D12
P3_AO
DAC_REF
DAC_REF
P18
MOTOR_EN
G11
PA_ON1|GPIO2
LCD_BL_EN
E16
PA_ON0
PA_ON
D17
PA_RANGE1|GP_PDM2
PA_RANGE1
G17
PA_RANGE0|GP_PDM1
PA_RANGE0
D20
TCXO_EN|GPIO94
TCXO_EN
H13
TRK_LO_ADJ
TRK_LO_ADJ
E13
R304
TX_AGC_ADJ
R306
V7
FRAME_SYNC
AA4
SH_IRQ
VREG_TCXO_2.85V
B19
MDDIH_DATP
Vdd_mddi
B18
Vdd_mddi
MDDIH_DATN
C301
A19
Vdd_mddi
MDDIH_STBP
A18
Vdd_mddi
MDDIH_STBN
B21
Vdd_mddi
MDDIC_DATP
B22
Vdd_mddi
MDDIC_DATN
A21
Vdd_mddi
MDDIC_STBP
A22
Vdd_mddi
MDDIC_STBN
G9
VF
H14
SH_STATUS0
D10
KYPD_17
G10
KYPD_15
A6
R310
KYPD_13
B6
KYPD_11
H11
KYPD_9
D5
KYPD_MEMO
D8
VCAM_EN
H10
GPIO43|ETM_PIPESTAT1B
HALL_SW
E8
PS_HOLD
G8
GPIO40|PM_INT_N
PM_INT_N
D7
GPIO39|UART1_DCD
BT_SAPA_SEL
AB24
AI
I_IP_CH0
RX_IP
AA24
AI
I_IM_CH0
RX_IM
W24
AI
Q_IP_CH0
RX_QP
Y24
AI
Q_IM_CH0
RX_QM
V24
AI
I_IP_CH1
U24
AI
I_IM_CH1
U22
AI
Q_IP_CH1
V22
AI
Q_IM_CH1
AE18
AI
MIC1P
MIC1P
AE17
AI
MIC1N
MIC1N
AE20
AI
MIC2P
MIC2P
AE19
AI
MIC2N
MIC2N
AD18
AI
AUXIP
AD17
AI
AUXIN
AA19
AI
HPH_VREF
AA18
AO
AUXOUT
AB20
R312
AI
LINE_R_IN
AB21
AFR
AI
LINE_R_IP
R313
AB18
AI
LINE_L_IN
AB19
AFL
AI
LINE_L_IP
AE16
AO
EAR1OP
RCV_P
AE15
AO
EAR1ON
RCV_N
AB16
Place near pin AA20
AO
LINE_OP
AB17
VREG_TCXO_2.85V
AO
LINE_ON
V16
AO
MICBIAS
MIC_BIAS
AA20
C302
AO
CCOMP
AA17
AO
HPH_R
W17
AO
HPH_L
Y22
HKAIN5
U301
AI
R314
W21
AI
HKAIN4
U19
1
4
AI
HKAIN3
VOUT
VCC
AD23
AI
HKAIN2
W22
AI
HKAIN1
ICHRG
V21
C305
AI
HKAIN0
AMUX_OUT
C306
2
3
NC
GND
B4
VDD_DIG12
B10
VDD_DIG11
B13
VDD_DIG10
A23
VDD_DIG9
D24
VDD_DIG8
F24
VDD_DIG7
VREG_MSMC_1.2V
R24
VDD_DIG6
AD14
VDD_DIG5
AD7
VDD_DIG4
AB2
VDD_DIG3
W2
VDD_DIG2
H2
VDD_DIG1
D2
VDD_DIG0
AB22
VSS_DIG13
A4
C322
VSS_DIG12
A10
VSS_DIG11
A13
VSS_DIG10
B23
C323
C324
C325
C326
C327
C328
C329
C330
C331
C332
VSS_DIG9
D25
VSS_DIG8
F25
VSS_DIG7
R25
VSS_DIG6
AE14
VSS_DIG5
AE7
VSS_DIG4
AB1
VSS_DIG3
VREG_MSME_1.8V
W1
VSS_DIG2
H1
VSS_DIG1
D1
VSS_DIG0
B20
VDD_PAD15
U2
VDD_PAD14
VREG_MSME_1.8V
R2
C333
VDD_PAD13
M2
VDD_PAD12
K2
VDD_PAD11
F2
C334
C335
C336
C337
C338
C339
VDD_PAD10
U1
VSS_PAD14
R1
VSS_PAD13
M1
VSS_PAD12
K1
VSS_PAD11
C340
F1
VSS_PAD10
AD13
VDD_PAD22
AD9
VDD_PAD21
AD5
C341
C342
VDD_PAD20
AE13
VSS_PAD22
VREG_MSMP_2.6V
AE9
VSS_PAD21
AE5
VSS_PAD20
B8
VDD_PAD33
B14
VDD_PAD32
VREG_MSMA_2.6V
J24
VDD_PAD31
P24
VDD_PAD30
A8
VSS_PAD33
A14
VSS_PAD32
C343
C344
C345
C346
C347
VREG_MSMP_2.6V
B16
VSS_PAD31
P25
VSS_PAD30
B3
VDD_PAD40
T18
VDD_QFUSE
C349
B17
R326
VDD_PLL
C348
C350
E12
VDDA
N22
C351
VDDA
AD21
VDDA
AA16
VDDA
Y25
VDDA
W25
VDDA
T25
VDDA
VREG_MSMA_2.6V
T24
VDDA
AD22
VDDA
AD16
R331
VDDA
D11
VSSA
N25
C352
VSSA
A20
VSSA
A17
VSSA
E17
VSSA
C357
C353
C354
C355
C356
AE21
VSSA
W18
VSSA
W16
VSSA
AB25
VSSA
V25
VSSA
AA25
VSSA
U25
VSSA
AE22
VSSA
AB15
VSSA
T19
VSSA
AC24
VSSA
7
8
9
10
11
12
13
< JTAG 32PIN >
L301
18
1
B_V_BATT
B_V_BUS
VBATT_B
USB_VBUS_5V_B
19
B_GND
B_D+ 2
GND_B
USB_D+_B
20
3
B_HP/PWR
B_D-
JTAG_JIG_ON_B
USB_D-_B
21
4
B_RXD
4
JTAG_UART1_RX_B
22 B_TXD
5
5
JTAG_UART1_TX_B
23
6
23
6
24
7
NC1
B_ANT
25
A_GND 8
A_V_BATT
VBATT_A
GND_A
26
9
A_GND
A_V_BUS
GND_A
USB_VBUS_5V_A
27
10
A_HP|PWR
A_D+
JTAG_JIG_ON_A
USB_D+_A
28
11
A_RXD
A_D-
JTAG_UART1_RX_A
USB_D-_A
29 A_TXD
NC3 12
JTAG_UART1_TX_A
30
13
30
NC4
31
14
31
NC5
32 32
15
NC6
33
16
33
NC7
34
17
A_ANT
NC2
** Placed in Board Outside
< ONE-NAND 2G / 1G >
R317
C320
C312
C321
C314
A2(1:16)
TP_A300
A2(1)
N10
A0
A2(2)
P10
A1
A2(3)
N9
A2
A2(4)
N8
A3
A2(5)
P9
A4
A2(6)
M8
A5
M7
A2(7)
A6
P8
A2(8)
A7
A2(9)
N5
A8
P5
A2(10)
A9
A2(11)
M5
A10
A2(12)
N4
A11
A2(13)
P4
A12
N3
A2(14)
A13
N2
A2(15)
A14
A2(16)
P3
D2(0:15)
A15
TP311
B9
D2(0)
DQ0
D2(1)
C8
DQ1
D2(2)
D7
DQ2
D2(3)
D6
DQ3
D2(4)
B6
VREG_MSME_1.8V
DQ4
D2(5)
E4
DQ5
D4
D2(6)
DQ6
D2(7)
D3
DQ7
D2(8)
D9
DQ8
D8
D2(9)
DQ9
C7
D2(10)
DQ10
D2(11)
C6
DQ11
D5
D2(12)
DQ12
D2(13)
E5
DQ13
D2(14)
C4
DQ14
D2(15)
B4
DQ15
C2
INT
NANDFLASH_READY
C9
TP_N_RDY
RDY
D10
CLK
R327
N6
WE2_N
_WE
R329
R330
M6
RESOUT_N
_AVD
N7
RESOUT_N_EBI1
_RP
TP312
C10
NANDFLASH_CS
_CE
C3
OE2_N
_OE
R332
A1(0)
TP315
L1
A0
A1(1)
L2
A1
A1(2)
L3
A2
A1(3)
M3
A3
A1(4)
F2
A4
A1(5)
D2
A5
A1(6)
F1
A1(7)
A6
E2
A1(8)
A7
E1
A8
A1(9)
E3
A9
A1(10)
K3
A10
A1(11)
F3
A11
A1(12)
H3
A12
A1(0:12)
10
11
12
13
14
15
16
Service Schmetics
< J-TAG CON >
L300
VBATT
1 V_BATT
USB_VBUS_5V
2
VBUS
3 GND
4
USB_D+
D+
5 HP_PWR
JTAG_JIG_ON
USB_D-
6
D-
7 RXD
JTAG_UART1_RX
8
JTAG_UART1_TX
TXD
9 ANT
VREG_MSMP_2.6V
L302
CN300
1 V_BATT
VBATT_B
2
1 V_JTAG
USB_VBUS_5V_B
VBUS
3 GND
2
GND_B
TMS
TMS
USB_D+_B
4
D+
RTCK
3 RTCK
JTAG_JIG_ON_B
5 HP_PWR
TRST_N
4
TRST_N
USB_D-_B
6
D-
TDI
5 TDI
7 RXD
6 TCK
JTAG_UART1_RX_B
TCK
8
7
TDO
JTAG_UART1_TX_B
TXD
TDO
9 ANT
8 PON_RESET_N
RESET_N
R305
9
GND
VDD is NC
L303
1 V_BATT
VBATT_A
2
USB_VBUS_5V_A
VBUS
3 GND
GND_A
4
USB_D+_A
D+
5 HP_PWR
JTAG_JIG_ON_A
6
USB_D-_A
D-
JTAG_UART1_RX_A
7 RXD
JTAG_UART1_TX_A
8
TXD
9 ANT
VREG_MSME_1.8V
R315
R316
C315
C316
C317
C318
C319
C307
C313
C308
C309
C310
C311
ground
ground
ground
ground
ground
ground
ground
ground
ground
ground
ground
ground
H2
BA0
SDRAM_BA0
J2
BA1
SDRAM_BA1
K10
DQM0
SDRAM_DQM(0)
E10
DQM1
SDRAM_DQM(1)
J8
DQM2
SDRAM_DQM(2)
E9
DQM3
SDRAM_DQM(3)
TP310
L7
D1(0)
DQ0
L8
D1(1)
DQ1
L9
D1(2)
DQ2
D1(3)
K7
DQ3
D1(4)
K8
DQ4
K9
D1(5)
DQ5
J6
D1(6)
DQ6
D1(7)
J7
DQ7
G10
D1(8)
DQ8
G9
D1(9)
DQ9
G8
D1(10)
DQ10
F7
D1(11)
DQ11
F8
D1(12)
DQ12
D1(13)
E6
DQ13
D1(14)
E7
DQ14
UME300
E8
D1(15)
DQ15
L6
D1(16)
DQ16
L5
D1(17)
DQ17
K6
D1(18)
DQ18
K5
D1(19)
DQ19
K4
D1(20)
DQ20
J5
D1(21)
DQ21
J4
D1(22)
DQ22
D1(23)
J3
DQ23
D1(24)
H7
DQ24
H6
D1(25)
DQ25
H5
D1(26)
DQ26
G7
D1(27)
DQ27
G6
D1(28)
DQ28
G5
D1(29)
DQ29
G4
D1(30)
DQ30
F6
D1(31)
DQ31
H11
CLK
SDRAM_CLK
F4
CKE
SDRAM_CKE
H9
TP314
_CS
SDRAM_CS
H8
TP316
_RAS
SDRAM_RAS_N
H4
TP317
_CAS
SDRAM_CAS_N
G3
TP318
_WE
SDRAM_WE_N
ground
Engineer:
SAMSUNG
GPG2
ELECTRONICS
Drawn by:
GPG2
R&D CHK:
TITLE:
DOC CTRL CHK:
EMERALD_CMC_REV0.7
MFG ENGR CHK:
Changed by:
Date Changed:
Time Changed:
QA CHK:
REV:
Drawing Number:
UMTS
March,11, 2008
14
15
16
A
B
C
D
E
F
G
D1(0:31)
H
I
J
K
Size:
L
A2
Page:
3

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