Samsung SGH-P960 Service Manual page 81

R_ANT
ANT102
1 2
C103
TA101
AFL
AFR
BT_WAKE
HOST_WAKE
C119
SLEEP_XTAL_IN
BT_RESET
BT_SLEEP
VREG_GP1
A7
MPP1|AMUX_IN1 VREG_GP2
B7
MPP2|AMUX_IN2 VREG_GP3
K3
AMUX_OUT
VREG_MMC
L2
MPP3|KPD_DRV_N VREG_MSMA
L1
MPP4|LCD_DRV_N VREG_MSME
L3
VIB_DRV_N VREG_MSMP
VREG_MSMC
D7
MPP5|RUIM_M_RST VSW_MSMC
H7
MPP6|RUIM_RST
D6
MPP9|RUIM_M_CLK VREG_RFRX1
H6
MPP10|RUIM_CLK VREG_RFRX2
D5
MPP11|RUIM_M_IO VREG_RFTX
H5
MPP12|RUIM_IO VREG_RFUBM
VREG_RUIM
K2
MPP7|CBLPWR_N
B4 U401
MPP8|REF_OUT
D4
OPT_1
H8
OPT_2
C11
REF_BYP VREG_TCXO
E10
REF_GND VREG_USB
D10
REF_ISET VREG_WLAN
B5
SPKR_IN_M
B6
SPKR_IN_P
A5
SPKR_OUT_M
A6
SPKR_OUT_P
XTAL_OUT
D8
TCXO_EN_1
E4
TCXO_EN_2
E11
TCXO_IN SBDT|SSBI
H10
TCXO_OUT_1
B10
TCXO_OUT_2
F11
TCXO_OUT_RF
TP_RF_TCXO
BAT_FET_N
G4
USB_DAT CHG_CTL_N
J1
USB_D_M
J2
USB_D_P HSET_BIAS
H2
USB_ID KPD_PWR_N
F4
USB_OE_N MSM_INT_N
F2
USB_OVP_G PON_RESET_N
H4
USB_SE0
H1
USB_VBUS SLEEP_CLK
C433
L101
R100
C104
L105
TA102
4
FM_AUDIO_L
2
FM_AUDIO_R
7
BT_WAKE|GPIO_0
6
HOST_WAKE|GPIO_1
U100
12
I2C_CLK
11
I2C_DATA
19
LPO_CLK
25
RST_N
16
TM0
20
VREG_CTRL
5
WLAN_BT_ACTIVITY|A_GPIO_5
10
WLAN_BT_PRIORITY_AND_STATUS|A_GPIO_4
8
GPIO_2|WLAN_TX_CONFX
A3
A2
B1
L9
G11
K8
J11
K4
K5
A9
A10
A8
B8
L10
L8
VREG_S2
L6
VREG_S3
K7
VSW_S2
K6 L402
VSW_S3
A1
G2
B11
R414
D1
ISNS_M
D2 R415
ISNS_P
L11
XTAL_IN
K11
F8
SBCK
G8
E8
SBST
J10
VCOIN
E2
C2
C1
VCHG
K1
L4
C10
G10
F10
PS_HOLD
K9
R424
SAMSUNG Proprietary-Contents may change without notice
This Document can not be used without Samsung's authorization
C105
C111 C112
9
GPIO_3
18
GPIO_4
31
GPIO_7
29
PCM_CLK
28
PCM_IN
26
PCM_OUT
30
PCM_SYNC
33
UART_CTS
32
UART_RTS
34
UART_RX
1
UART_TX
D18
TCXO AI
A9
USB_XTAL48_IN
AI
B9
USB_XTAL48_OUT AO
A15
SLEEP_XTAL_IN
P3_AI
B15
SLEEP_XTAL_OUT P3_AO
C24
RESERVED
G13
RESIN_N P3_IS
G12
RESOUT_N P3_O
W5
RESOUT_N_EBI1 P1_O
AD15
WDOG_EN P3_IS-PU
G24
WDOG_STB|GPIO_0|SBCK1 P3_npPDpu
R22
MODE2 P3_IS-PD
T22
P3_IS-PD
MODE1
Y21
MODE0 P3_IS-PD
AC2
BOOT_MODE3 P1_IS
AD20
BOOT_MODE2 P3_IS
AD19
BOOT_MODE1 P3_IS
L2
LB1_N|SDRAM1_DQM0 P1_O
L4
UB1_N|SDRAM1_DQM1 P1_O
R8
WE1_N|SDRAM1_WE_N P1_O
V2
P1_O
OE1_N|SDRAM_CLK_EN2
T8
A1_25|GPIO75|SDRAM1_DQM3
P1_npPDpu
V1
A1_24|GPIO79SDRAM1_A0 P1_npPDpu
R7
A1_22|SDRAM1_D31 P1_B-K
R4
A1_21|SDRAM1_D30 P1_B-K
R5
A1_20|SDRAM1_D29 P1_B-K
N8
A1_19|SDRAM1_D28 P1_B-K
T2
A1_18|SDRAM1_D27 P1_B-K
T1
A1_17|SDRAM1_D26 P1_B-K
P5
A1_16|SDRAM1_D25 P1_B-K
P4
A1_15|SDRAM1_D24 P1_B-K
M8
SDRAM_BA1 A1_14
P1_B-K
P7
SDRAM_BA0 A1_13 P1_B-K
N5
A1_12
P1_B-K
P2
A1_11 P1_B-K
P1
A1_10 P1_B-K
N1
A1_9 P1_B-K
N2
A1_8 P1_B-K
N7
A1_7 P1_B-K
M7
A1_6 P1_B-K
M5
A1_5 P1_B-K
L5
A1_4 P1_B-K
L8
A1_3 P1_B-K
L7
A1_2
P1_B-K
L1
A1_1 P1_O
W4
XMEM1_CS_N3|GPIO77|SDRAM1_CS_N1 P1_nppdPU
U5
XMEM1_CS_N2|SDRAM1_CS_N0 P1_O
Y1
XMEM1_CS_N1|GPIO76 P1_nppdPU
V4
XMEM1_CS_N0|SDRAM1_CS_N2 P1_O
R311 AA1
ROM1_CLK|SDRAM1_CLK P1_O
G1
ROM1_ADV_N|SDRAM1_RAS_N P1_O
V5
XMEM1_HWAIT_N|SDRAM1_CLK_EN1 P1_BS-PU
K8
XMEM1_LWAIT_N|SDRAM1_CAS_N
P1_BS-PU
M4
P1_O
SDRAM1_CLK_EN0
U4
SDRAM1_D23|GPIO74|EBI1_HUB_N P1_B-K
U7
SDRAM1_D22|GPIO73|EBI1_HLB_N P1_B-K
AA2
SDRAM1_D21|GPIO72 P1_B-K
Y2
SDRAM1_D20|GPIO71 P1_B-K
E1
SDRAM1_D19|GPIO70 P1_B-K
P8
SDRAM1_D18|GPIO69 P1_B-K
T4
SDRAM1_D17|GPIO68 P1_B-K
T7
SDRAM1_D16|GPIO67 P1_B-K
K4
SDRAM1_D15|D1_15 P1_B-K
K7
P1_B-K
SDRAM1_D14|D1_14
K5
SDRAM1_D13|D1_13 P1_B-K
J1
SDRAM1_D12|D1_12 P1_B-K
J5
SDRAM1_D11|D1_11
P1_B-K
J2
SDRAM1_D10|D1_10 P1_B-K UCP300
J4
SDRAM1_D9|D1_9
P1_B-K
N4
SDRAM1_D8|D1_8 P1_B-K
J7
SDRAM1_D7|D1_7 P1_B-K
G2
SDRAM1_D6|D1_6 P1_B-K
H5
SDRAM1_D5|D1_5 P1_B-K U601
Y4
P1_B-K
SDRAM1_D4|D1_4
E2
SDRAM1_D3|D1_3 P1_B-K
Y5
SDRAM1_D2|D1_2 P1_B-K
G4
SDRAM1_D1|D1_1
P1_B-K
H4
SDRAM1_D0|D1_0 P1_B-K
AE11
A2_20|GPIO34LCD_RSEBI2_HLB_N P2_npPDpu
AA14
P2_B
A2_19|D217WAIT_N
V14
A2_18|D216ADV_N P2_B
AB13
A2_17 P2_O
AD12
P2_B
A2_16
W13
A2_15 P2_B
AB12
A2_14 P2_B
AA13
A2_13 P2_B
AE10
A2_12 P2_B
AD10
A2_11 P2_B
AB11
A2_10 P2_B
AA12
P2_B
A2_9
W12
A2_8 P2_B
V13
A2_7 P2_B
AB10
A2_6 P2_B
AA11
A2_5 P2_B
AB9
A2_4
P2_B
V12
A2_3 P2_B
AA9
A2_2 P2_B
AA10
A2_1 P2_B
AD8
LB2_N|A2_0|NAND2_ALE P2_O
AE8
P2_O
UB2_N|NAND2_CLE
V15
NAND2_FLASH_READY|GPIO33|EBI2_PNAND_READY P2_nppdPU
AE12
LCD_CS_N|GPIO38 P2_nppdPU
AD11
LCD_EN|GPIO37|HUB_N P2_npPDpu
AA15
XMEM2_CS_N3|GPIO36 P2_nppdPU
W15
XMEM2_CS_N2|GPIO35 P2_nppdPU
AB14
XMEM2_CS_N1|NAND2_CS_N P2_O
W14
XMEM2_CS_N0|NAND1_CS_N P2_O
AE4
WE2_N P2_O
AE6
P2_O
OE2_N|NAND2_RE_N
AA8
D2_15 P2_B-K
AB8
D2_14 P2_B-K
R416
W11
D2_13 P2_B-K
W10
D2_12 P2_B-K
AD6 C428
D2_11 P2_B-K
AB7
D2_10 P2_B-K
V11
D2_9 P2_B-K R415
W9
D2_8 P2_B-K
AA7
P2_B-K
D2_7
AD4
D2_6 P2_B-K
V10
D2_5 P2_B-K
AB6
D2_4 P2_B-K
AB5
D2_3 P2_B-K
W8 C405
D2_2
P2_B-K
AD3
D2_1 P2_B-K
AA6
D2_0 P2_B-K
K25
UART1_DP_TX_DATA|GPIO95|NAND_BOOT_ERR P3_npPDpu
U21
KEYSENSE4_N|GPIO48|ETM_TRACE_PKT2 P3_nppdPU
P21
KEYSENSE3_N|GPIO47|KYPD_7|ETM_TRACE_PKT1 P3_nppdPU
D13
KEYSENSE2_N|GPIO46|KYPD_5|ETM_TRACE_PKT0 P3_nppdPU
P19
KENSENSE1_N|GPIO63|KEYSENSE1_N|KYPD_3 P3_nppdPU
R19
KEYSENSE0_N|GPIO62|KYPD_1|ETM_PIPESTAT0 P3_nppdPU
C433
M18
P3_npPDpu
RINGER|GPIO18|CAMIF_EN
H16
UART1_RFR_N|GPIO93|SBST1 P3_nppdPU
R18
UART1_CTS_N|GPIO97 P3_npPDpu
L22
UART1_DP_RX_DATA|GPIO96 P3_npPDpu
C2
UART2_RFR_N|USIM_CLK|GPIO91
P4H_HnpPDpu
F4
UART2_CTS_N|USIM_RESET|GPIO90 P4H_HnpPDpu
G5
UART2_DP_RX_DATA|USIM_PWR_EN|GPIO89 P4H_HnpPDpu
F5
UART2_DP_TX_DATA|USIM_DATA|GPIO88 P4H_HnpPDpu
K24
UART3_RFR_N|GPIO87|TSIF_CLK P4H_HnpPDpu
K22
P4H_HnpPDpu
UART3_CTS_N|GPIO86|TSIF_ENABLE|PM_SBDT
M21
UART3_DP_RX_DATA|GPIO85|TSIF_DATA|PM_SBST
M19
UART3_DP_TX_DATA|GPIO84|TSIF_ERROR|TSIF_NULL|TSIF_SYNC|PM_SBCK
P4H_HnpPDpu
M25
USB_DAT_VP P3_B-K P4H_HnpPDpu
N21
USB_SE0_VM
P3_B-K
M24
USB_OE_TP_N P3_B-K
L25
SDCC_DAT3|GPIO101
L24
SDCC_DAT2|GPIO100
K19
SDCC_DAT1|GPIO99
E14
SDCC_DAT0|GPIO32|MMC_DATA
L18
SDCC_CLK|GPIO31|MMC_CLK
G14
SDCC_CMD|GPIO30|MMC_CMD
P3H_HnppdPU
P3H_HnppdPU
P3H_HnppdPU
P3H_HnppdPU C423
P3H_HnppdPU C422
P3H_HnppdPU
C420
9-43
Flow Chart of Troubleshooting
VREG_BT_2.6V
L104
C109
I2S_FM_RL
I2S_FM_DOUT
I2S_FM_CLK
BT_PCM_CLK
BT_PCM_DOUT
BT_PCM_DIN
BT_PCM_SYNC
BT_UART_RTS
BT_UART_CTS
BT_UART_TX
BT_UART_RX
E11
P3_O TX_ON|GRFC10
D6
GPIO12|GRFC9
P3_npPDpu
E7
P3_npPDpu GPIO11|GRFC8
P22
GPIO10|GRFC7
P3_npPDpu
T21
P3_npPDpu GPIO9|GRFC6
E10
P3_npPDpu GPIO6|GRFC3
D9
P3_npPDpu
GPIO5|GRFC2
B7
P3_npPDpu GPIO3|GRFC0
B11
P3_AO I_OUT
B12
P3_AO I_OUT_N
A12
P3_AO Q_OUT
A11
P3_AO Q_OUT_N
D12
P3_AO DAC_REF
P18
P3_npPDpu PA_ON2|GPIO29|BM_INT|TSIF_SYNC
G11
P3_npPDpu
PA_ON1|GPIO2
E16
P3_O PA_ON0
D17
P3_Znppdpu PA_RANGE1|GP_PDM2
G17
P3_Znppdpu PA_RANGE0|GP_PDM1
D20
P3_nppdPU TCXO_EN|GPIO94
H13
P3_Znppdpu TRK_LO_ADJ
E13
P3_Znppdpu TX_AGC_ADJ R306
V7
P2_nppdPU MDP_VSYNC_PRIMA_RY|GPIO105
AA4
P2_nppdPU MDP_VSYNC_SECON_DARY|GPIO104
B19
Vdd_mddi MDDIH_DATP
B18
MDDIH_DATN
Vdd_mddi
A19
Vdd_mddi MDDIH_STBP
A18
Vdd_mddi MDDIH_STBN
B21
Vdd_mddi MDDIC_DATP
B22
Vdd_mddi MDDIC_DATN
A21
Vdd_mddi MDDIC_STBP
A22
Vdd_mddi MDDIC_STBN
G9
P3_nppdPU GPIO66|MONO_STEREO_HS_DET_N|ETM_TRACECLK
H14
P3_nppdPU GPIO64|UART1_RI|ETM_PIPESTAT2
D10
GPIO53|KYPD_17|ETM_TRACE_PKT7
P3_nppdPU
G10
P3_nppdPU GPIO52|KYPD_15|ETM_TRACE_PKT6
A6
P3_nppdPU GPIO51|KYPD_13|ETM_TRACE_PKT5
B6
P3_nppdPU GPIO50|KYPD_11|ETM_TRACE_PKT4
H11
P3_nppdPU GPIO49|KYPD_9|ETM_TRACE_PKT3
D5
P3_npPDpu GPIO45|KYPD_MEMO|ETM_TRACESYNC_B
D8
P3_nppdPU GPIO44|UART1_DTR|ETM_PIPESTAT0B|GP_CLK
H10
P3_nppdPU GPIO43|ETM_PIPESTAT1B
E8
P3_npPDpu GPIO42|PS_HOLD|ETM_PIPESTAT2B
G8
P3_nppdPU GPIO40|PM_INT_N
D7
P3_nppdPU GPIO39|UART1_DCD
AB24
I_IP_CH0
AI
AA24
AI I_IM_CH0
W24
AI Q_IP_CH0
Y24
AI Q_IM_CH0
V24
AI I_IP_CH1
U24
AI I_IM_CH1
U22
AI Q_IP_CH1
V22
AI Q_IM_CH1
AE18
AI MIC1P
AE17
MIC1N
AI
AE20
AI MIC2P
AE19
AI
MIC2N
AD18
AI AUXIP
AD17
AI AUXIN
AA19
AI HPH_VREF
AA18
AO AUXOUT
AB20 R312
AI LINE_R_IN
AB21
AI LINE_R_IP
R313
AB18
AI LINE_L_IN
AB19
AI
LINE_L_IP
AE16
AO EAR1OP
AE15
EAR1ON
AO Place near pin AA20
AB16
AO LINE_OP
AB17
LINE_ON
AO
V16
AO MICBIAS
AA20 C302
AO CCOMP
AA17
AO HPH_R
W17
AO HPH_L
Y22
AI HKAIN5
W21
AI HKAIN4
U19
HKAIN3
AI
AD23
AI HKAIN2
W22
HKAIN1
R403 AI
V21
AI HKAIN0
B4
VDD_DIG12
B10
VDD_DIG11
B13
VDD_DIG10
A23
VDD_DIG9
D24
VDD_DIG8
F24
VDD_DIG7
R24
VDD_DIG6
AD14
VDD_DIG5
AD7
VDD_DIG4
AB2
VDD_DIG3
W2
VDD_DIG2
H2
VDD_DIG1
D2
VDD_DIG0
AB22 D400
VSS_DIG13
A4
VSS_DIG12
A10
VSS_DIG11
A13
VSS_DIG10
B23
VSS_DIG9
D25
VSS_DIG8
F25
VSS_DIG7 D401
R25
VSS_DIG6
AE14
VSS_DIG5
AE7
VSS_DIG4
AB1
VSS_DIG3
W1
VSS_DIG2
H1
VSS_DIG1 R418 R412
D1
VSS_DIG0
B20
VDD_PAD15
U2
VDD_PAD14
R2
VDD_PAD13
M2 C416
VDD_PAD12
K2
VDD_PAD11
F2
VDD_PAD10
U1
VSS_PAD14
R1
VSS_PAD13
M1
VSS_PAD12
K1
VSS_PAD11
F1
VSS_PAD10
AD13
C400
VDD_PAD22
AD9
VDD_PAD21
AD5
VDD_PAD20
AE13
VSS_PAD22
AE9
VSS_PAD21
AE5
VSS_PAD20
B8
VDD_PAD33
B14
VDD_PAD32
J24
VDD_PAD31
C417
P24
VDD_PAD30
A8
VSS_PAD33
A14
VSS_PAD32
B16
VSS_PAD31
P25
VSS_PAD30
B3
VDD_PAD40
T18
VDD_QFUSE
B17
VDD_PLL
E12
VDDA
N22
VDDA
AD21
VDDA
AA16
VDDA
Y25
VDDA
W25
VDDA
T25
VDDA
T24
VDDA
AD22
VDDA
AD16
VDDA
D11
VSSA
N25
VSSA
L402 L401 A20
VSSA
A17
VSSA
E17
VSSA C357 C353 C354
AE21
VSSA
W18
VSSA
W16
VSSA
AB25
VSSA
V25
VSSA
AA25
VSSA
U25
VSSA
AE22
VSSA
AB15
VSSA
T19
VSSA
AC24
VSSA
C425 C424