Sanyo C21EF27 Service Manual page 6

ing signal is current amplified by the drive transformer
T431 and drives the output transistor Q432. When Q432
becomes ON, an amplifying current flows directly to DY
through C441/C442
tion is performed in the last half of the scanning period.
Next, when Q432 becomes OFF, the charge that had
been stored in DY up to that point releases a resonance
current to the resonant capacitors C421/C423 and
charges them. The current stored in C421/C423 is then
flowed back to DY, and an opposite charge is then stored
in DY. This opposite charge then switches the dumper
diode in Q432 ON, the resonance state is completed, and
an amplifying current is then flowed again directly to DY
through the dumper diode. By this means, deflection in the
first half of the scanning period is performed, and when
Q432 becomes ON at the end of the first half of the scan-
ning period, deflection during the last half is begun, thus
completing one cycle.
In the PCC circuit consisting of Q461 and Q462, the
parabola signal supplied from the vertical circuit is added
at the horizontal output stage and pincushion compensa-
tion is performed by varying the DC voltage bias. Further,
the ABL voltage is feedback to the base of Q462 to com-
pensate for width variations due to variations in the beam
current.
7. CPU <System and Teletext Control>
Pin description
Pin1: Tuning voltage output
Pin2: Band switch output 3 (UHF)
Pin3: Sharpness control output (6-bit DAC)
Pin4: Colour control output (6-bit DAC)
Pin5: Contrast control output(6-bit DAC)
Pin6: Brightness control output(6-bit DAC)
Pin7: Volume control output(6-bit DAC)
Pin8: Power ON/OFF output (Power-On:Lo)
Pin9: AFT signal input
Pin10: Option SW1&Keyboard scan input (DC)
Pin11: Option SW2
Pin12: 50/60Hz switch input (50Hz: Hi)
Pin13: GND
Pin14: TV/AV switch output (TV: Hi)
Pin15: 5.5/6.5 switch output
Pin16: Nega./posi switch output
Pin17: Function signal input for SCART
Pin18: L switch output
Pin19: L' switch output
Pin20: LED drive
Pin21: Ignore output
Pin22: GND
Pin23: CVBS input0 (Internal)
Pin24: CVBS input1 (Internal/External)
Pin25: Black
Pin26: IREF
Pin27: Odd/Even output
DY Q432 GND, and defec-
Pin28: GND
Pin29: -
Pin30: V-deflection stop output(Stop:Lo)
Pin31: RGB REF
Pin32: Blue output for OSD
Pin33: Green output for OSD
Pin34: Red output for OSD
Pin35: Blanking output for OSD
Pin36: H-sync. input (Horizontal pulse for OSD)
Pin37: V-sync. input (Vertical pulse for OSD)
Pin38~39: Supply (+5V)
Pin 40: OSC GND
Pin 41: Oscillator input for CPU
Pin 42: Oscillator output for CPU
Pin 43: Reset input
Pin 44: Supply (+5V)
Pin 45: Protect signal input (L:Power circuit defects)
Pin 46: Ident. signal input
Pin 47: R/C signal input
Pin 48: Mute output in no picture
Pin 49: I 2 C bus SCL (Serial clock)
Pin 50: I 2 C bus SDA (Serial date)
Pin 51: Option SW5 & Band switch output1
Pin 52: Band switch output2
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Service manual-EC5 chassis