Output Amplifier - Tektronix 7a11 Instruction Manual

Circuit Description-7A11
re d
uctio n .
P
olarity
r
elay Κ431 is de-e nergize d
during + UP
operation . Wh en I NVERT operatio n is selected at the front
p anel, Κ431 is activated a n
d
exchanges the connections
b
eing ma
d
e
b
etween
t
he two
h alves of th e Input Amplifier
and
t
he two
h
alves of the Out
p
ut Amplifier.
The
V
AR IA BLE circuit co nsists of 0198, Q184, Q194,
U
194, and associated compone n ts . Q198 is h
eld non-
conducting
d
uring calibrate d
gain operation. D uri ng vari-
a b le gain operation, it acts as α resistor with its value
d
e-
termined by the
p
osition of the
V
AR IA BLE control. Since
0198 is in
p
arallel with R126-R146 an
d
R175-R176,
d
e-
creasing its resistance
d
ecreases the Q124A-Q124 B loa
d
impe dance, thereby
d
ecreasing stage gain .
Q198 is co ntrolled as follows: When
t
he
V A RIA BLE
control is at CA L IN (S180A o
p
en), the 6.72 mA
d
e-
ma n
d
e
d
b y t he Q184-R 184 circuit causes about -7 .23 V to
b
e
d
eveloped at the R182-R183 j
unction. Since S180A is
open, no current flows thro ug h R 180 an
d
t
h is same voltage
ap
p
ears at the R 180 wiper and at the non-inverting in put of
U194 . The R192-R193 voltage divider applies approxi-
mately -7 .20 V to the inverting in p ut of
U
194. Wit h
t
he
non-inverting input more negative t han t he inverting input,
the U 194 output is
h
eld
b elow -12 V an d the R 195- R 196
voltage divider ap
p
lies ap
p
roximately -16 V to the gates of
Q194 and Q198,
h
ol
d
ing them
b ot h cu t off.
Wh en
V AR IA BLE control is
d
esired, the
k
nob is
p lace
d
in the outwar
d
p
osition, closing S180A. Α voltage more
positive t han
t
hat at the R 182- R 183 ju nction can then be
selected at th e
V
AR IA BLE wi
p
er an d
a
p
plied to the
U
194
non-inverting inp ut . The output of
U
194 then changes in α
p
ositive
d
irection, with
t he amplifie d change app eari ng at
t h e gates of Q194 an d
Q198 . Wh en
t
he output moves
sufficiently
p
ositive, Q194 co nducts, becoming α resistive
shu nt across R 191 and R192 . When the Q194 resistance
b
e-
comes low enough , the R 192-R 193
j
unction voltage rises to
the same value as the R 180 wi per voltage and the
U
194
output voltage sta bilizes at the established value.
Circuit design causes equ al currents to flow through
R 191 an
d
R 192.
W
ith
t
heir common
j
u nction tied to -7 .1
V,
the Q194 source an
d d
rain connections swing equally
above an
d
b elow -7 .1 V resp ectively, simulating the push-
pull con
d
itions associated with Q198 .
Si nce the Q194 gate
p
otential is also being app lied to the
Q198 gate, t he Q198 resistance
d
uplicates the 0194 resist-
ance, creati ng α
s
hunt across the Q124A-Q124 B push-pull
load .
E
ither source-to-
d
rain or
d rain-to-source cur rent flow
can occ u r in Q198,
d epend ing upon th e instanta neous
polarity of push-pull signals.
3- 4
The ST EP ΑΤΤΕΝ
B A L circuit is ca pable of applying α
small voltage at the
b
ase of Q1 24A, thus affecting the cur-
rent being condu cte
d
by that transistor . Wh en
p ro p erly
a d
j uste
d
, equal current will flow through Q124A and
Q124 B . T h us, u nder no-signal con
d
itions, when the
P O LAR ITY control is switche d between +UP and I NVER T,
no trace sh ift will occur. The ST EP ΑΤΤΕΝ
B
A L CENTER-
ING a
d
ju stment
p ermits initial adj ustment of the circuitry
so that α balanced con
d
ition is obtainable with
t
he front
p anel ST EP ΑΤΤΕΝ
B
A L adj ustment near mi d
ra nge .
The offset connection at the Q124A base
p ermits be-
tween 0 an
d
+ or - 1 V to
b
e applie
d
to the
b ase of Q124A
when O FF SET ON is selected at the front
p
anel .
N
ormally,
the offset voltage in jecte d
at this
p
oint is limited to an
amount sufficient to cancel α DC or AC signal component,
returning the
d esire d portion of the dis
p
lay to the graticule
center .
General Descri
p
tion
O
UTPUT AMPL I FI ER
The Out p ut Am
p
lifier is α
b
alance
d
circuit consisti ng of
four
p
rincipal
p
arts . T hey are:
F
irst Am
p
lifier Q204A,
Q224, Q204 B , Q234 ; Seco n
d
Amplifier Q244, Q248,
Q254, Q258 ; Output Stage Q264, Q274 ; and Trigger
Am
p
lifier Q284, Q294 . T he Out put Amplifier
h
as α total
voltage gain of about 12 w h ic h is distri buted as follows:
F
irst Am
p
lifier 2.8, Seco n
d
Amplifier 3.7, O u tput Stage
1 .25.
Detaile d
Descri
p
tion
The two si
d
es of the
F
irst Am
p
lifier stage share the cur-
rent flowing in R 213.
M ost of this current is obtained from
R 237.
U
n
d
er bala nce
d
no-signal co nd itions, the current is
divi
d
ed equally between R 226 an
d
R 236, with
t
he current
in t he upper
h
alf passing through loa d
resistor R226,
grou n de d base transistor Q224, thermal time constant cir-
cuit C204-11204, throug h Q204 a n d R202. Current flow in
t he lower side of this circuit
p asses through e
q
uivalent com-
ponents.
U
n
d
er signal in put con
d
itions, an equal an
d
op
p
osite signal current change occurs in Q204A and
Q204 B . The resultant voltage ch anges across R 226 and
R236 are app lied to the Secon
d
Amplifier stage. C203 an
d
C234
p
rovi d
e frequency compensation for the
F
irst Am
p
li-
fier stage . C211 and R 211
p
rovi
d
e freq uency compensation
for t h e p robe.
Un
d
er
b
alance d conditions, approximately +2 volts
a pp ears at th e emitters of Q224 an
d
Q234 . When
t h e
P OSITIO N control is electrically centered, it also has
app roximately +2 V at its wi
p
er and no current flows in
R206 an
d
R216. Wh en fully offset, the wi per senses -11 V
or +15
V . R206 is thus able to either add or su btract
ap proximately 0.65 mA to t he upper si
d
e of the amplifier
circuit, w h ile R 216 adds or su btracts an e
q
ual (and