Functional Description - LG -A290 Service Manual

3.7.3 Functional Description

Power Subsystem

MT666 contains several LV (low voltage, .8V to 1.5V) linear regulators to provide power supply for every power domain,
including RF circuitry and digital core circuitry. Furthermore, it has built-in BAT linear regulator which allows the chip to
connect directly to Li-Ion battery power supply. The supported battery voltage ranges from 3.V to 4.3V.
The input pin LDO8EN is used by the host controller to turn on and off the BAT regulator. The host can control this pin
to enable the whole MT666 system. The enable voltage (VIH) of pin LDO8EN is 1.5V. Please be sure that the control
signal meets this requirement in order for the system to operate correctly. The built-in LV linear regulators for RF circuitry
are cap-less regulators. It provides high PSRR for achieving excellent RF performance. The power controls for these RF
LDOs are maintained internally by digital controller for optimized power consumption.
The DIG (digital) LV regulator requires an external capacitor. When the 1.V power is supplied from the regulator on
VDD1 pins, an internal POR (Power-On Reset) will be generated to start the system. An external system reset to start the
system is optional according to the application requirement.
Clock generation

There are two clock domains inside MT666. One is the SYSTEM reference clock which is used for the Bluetooth and MCU
system operations. The second is the LPO clock, which is a low-power 3.768KHz reference clock used for FM system and
also maintaining Bluetooth link during sleep mode operations. The use of the LPO clock for FM system allows the entire
MT666 to be operating in the lowest possible power consumption mode when the rest of the system is under sleep
state.
MT666 has two options for the SYSTEM clock source input. It can either be a one-pin crystal input, or it can come from
external clock source. MT666 supports most widely used clock frequencies in the mobile handset platform. They include
13, 16, 19., 6, and 3MHz.
To save system BOM cost, the SYSTEM clock can be shared with the clocks available on the mobile handset platform.
For example, the reference clock used for mobile base-band chipset can also be used as the MT666 source clock. In
this configuration, an output pin SRCLKENA from MT666 is used as the enable signal for the external clock source. The
generation of the signal is coupled to the internal sleep mode control function. The input frequencies can be selected by
GPIO trapping or detected automatically based on the availability of externally supplied 3.768KHz clock.
The LPO clock can come from the host chip in both QFN40 and WLCSP package, or an external oscillator for WLCSP only.
Chip power management

MT666 is designed such that Bluetooth and FM functions can be operated concurrently and independently without
interference. With sophisticated built-in state control and advanced power management, the operating mode can be
changed seamlessly while achieving minimum power consumption.
MT666's operating modes can be categorized into 6 major modes
- Chip power off mode.
- Power-on Init mode.
- Bluetooth standalone operation mode.
- FM standalone operation mode.
- Bluetooth + FM concurrent operations mode.
- System deep sleep mode.
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