LG -A290 Service Manual page 32

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3.6.2 Features
Device Architecture
- Flash Die Density: 18, 56, 51 Mbit, or 1Gbit.
- PSRAM Die Density: 3Mbit to 51Mbit.
- x16 Non-Mux, AD-Mux, or AAD-Mux I/O Interface Option.
- Virtual Address Option.
Device Voltage
- Core: VCC = 1.8 V
- I/O: VCCQ = 1.8 V
Device Packaging
- Ballout: x16C with 107 Active Balls, QUAD+ with 88 Active Balls, or LPCP 56-ball NOR/PSRAM AD-Mux.
- Area: 6.x7.7 mm to 11x13 mm.
- Height: 1.0 mm to 1.4 mm.
PSRAM Performance
- 70 ns Initial Read Access.
- 0 ns Asynchronous Page-Mode Read 133, 104, and 80Mhz with 5.5, 7, and 9ns Clock-to-Output Synchronous Burst-
Mode Reads.
- Configurable 4-, 8-, 16- and Continuous-Word Burst-Length Reads and Writes- Partial-Array and Temperature-
Compensated Self Refresh- Programmable Output Impedance.
Quality and Reliability
- Extended Temperature –5 °C to +85 °C
- Minimum 100K Flash Block Erase Cycles.
- ETOX™ IX (Flash) and ETOX™ X (Flash)Technology on 18 Mbit, 56 Mbit, and 51Mbit M18 die; ETOX™ X (Flash) on 1
Gbit M18 die.
Flash Performance
- 96 ns Initial Read Access; 15 ns Asynchronous Page-Mode Read.
- Up to 133 MHz with 5.5 ns Clock-to-Data Output Synchronous Burst-Mode Read.
- Buffered Enhanced Factory and 1.8 V Low-Power Buffer Programming Modes: μs/Byte (Typ).
- Deep Power-Down Mode:  μA (Typ).
- Configurable Output Driver.
LGE Internal Use Only
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Copyright © 01 LG Electronics. Inc. All right reserved.
3. TECHNICAL BRIEF
Only for training and service purposes

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