System Configuration - LG 65UH8500 Service Manual

System Configuration

Clock for M16
XTAL_IN
EAW61645502
X101
R101
X-TAL_1 GND_2
1M
1 4
R102
GND_1 X-TAL_2 120
2 3 XTAL_OUT
C101
C102
5pF
5pF
50V
50V
MAIN Clock(24Mhz)
+3.3V_NORMAL +3.3V_NORMAL
+3.3V_TU
I2C PULL UP
I2C
I2C-0 : AMP
I2C-1 : MICOM
I2C-2 : T-CON,L/DIMING
I2C-3 : S/Demod,T2/Demod, LNB
I2C-4 : NVRAM
I2C-5 : TUNER_MOPLL(T/C,ATV)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2015 LG Electronics Inc. All rights reserved.
Only for training and service purposes
BR24G256FJ-3
NVRAM
A0
+3.3V_NORMAL
A1
EAN61133501 A2
IC102
C104
AT24C256C-SSHL-T
GND
0.1uF
16V
A0 VCC
1 8
NVRAM_Rohm
A1 WP
2 7
1/16W
33
AR106
A2 SCL
3 6 I2C_SCL4
GND SDA
4 5 I2C_SDA4
NVRAM_ATMEL
Write Protection
- Low : Normal Operation
- High : Write Protection
I2C_SDA0
I2C_SCL0
I2C_SDA1
I2C_SCL1
I2C_SDA2
I2C_SCL2
I2C_SDA4
I2C_SCL4
I2C_SDA5
I2C_SCL5
+3.3V_NORMAL
IC102-*1
VCC
1 8
WP
2 7
SOC_RESET
SCL
3 6
SDA
4 5
L/DIM0_VS L/DIM0_VS
L/DIM0_SCLK L/DIM0_SCLK
L/DIM0_MOSI L/DIM0_MOSI
VX1_MSE
VX1_AGP
EPI_LOCK_MNT
EPI_LOCK_MNT
FORCED_JTAG_0
CPU_VID[0]
CPU_VID[1]
Designated GPIO
for OLED
OLED_3D_EN MODEL_OPT_12
EMMC_DATA[0-7]
SOC_EMMC_STRB
EAN63846302
IC101
LGE1312(M16)
R126
B23
10K
XTAL_IN XIN
USB2_0_DP0
OPT A24
XTAL_OUT XOUT USB2_0_DM0
R127 USB2_0_TXRTUNE
AH18
PORES_N
22
USB2_1_DP0
AA8
BOOT_MODE_0
USB2_1_DM0
C106
AB8
0.1uF
BOOT_MODE_1 USB2_1_TXRTUNE
16V AD7
PLLSET0
BOOT MODE
AC7
PLLSET1 USB3_0_DP0
USB3_0_DM0
- '00 ': eMMC AE6
OPM0 USB3_0_TX0P
- '10 ': NAND AE7
OPM1 USB3_0_TX0M
- 'X1 ': NOR (TEST ONLY)
USB3_0_RX0P
AC3
L_VSOUT_LD USB3_0_RX0M
AC6
DIM0_SCLK USB3_0_RESREF
AD6
TCK0
DIM1_SCLK
AC5
TDI0 DIM1_MOSI USB3_1_DP0
AD5
DIM0_MOSI USB3_1_DM0
USB3_1_TX0P
AJ22
VX1_MSE
SPI_CS0 USB3_1_TX0M
AH22
VX1_AGP
SPI_SCLK0 USB3_1_RX0P
AJ23
SPI_DO0 USB3_1_RX0M
AK23
SPI_DI0 USB3_1_RESREF
AH24
A_SPI_CS_S
SPI_CS1
AK24
SPI_SCLK_S
SPI_SCLK1 HUB_PORT_OVER0
AH23
SPI_MOSI_S SPI_DO1 HUB_VBUS_CTRL0
AJ24
SPI_MISO_S
SPI_DI1
EB_CS3
R173 10K AB7
OPT
EXT_INTR0 EB_CS2
R134 4.7K AC8
EXT_INTR1 EB_CS1
AD8
EXT_INTR2 EB_CS0
AE8
EXT_INTR3
EB_WE_N
AJ19
SOC_RX
UART0_RXD EB_OE_N
AH19
SOC_TX
UART0_TXD EB_WAIT
AH9
UART1_RX
UART1_RXD EB_BE_N1
AH8
UART1_TX
UART1_TXD EB_BE_N0
AH10
UART1_RTS CAM_CD1_N
AJ10
UART1_CTS CAM_CD2_N
CAM_CE1_N
1/16W AJ13
I2C_SCL0
33 SCL0 CAM_CE2_N
AH13
AR100
I2C_SDA0 SDA0 CAM_IREQ_N
AK11
I2C_SCL1
SCL1 CAM_RESET
AJ11
I2C_SDA1 SDA1 CAM_INPACK_N
AH12
I2C_SCL2
SCL2 CAM_VCCEN_N
AH11
I2C_SDA2
SDA2 CAM_WAIT_N
AK20
I2C_SCL3
SCL3 CAM_REG_N
AJ20
I2C_SDA3
SDA3
AK12
I2C_SCL4
SCL4
AJ12
I2C_SDA4
SDA4 EB_ADDR0
AK21
I2C_SCL5 SCL5 EB_ADDR1
AJ21
I2C_SDA5
SDA5 EB_ADDR2
PWM2 EB_ADDR3
R139 33 Y7
PWM_DIM2
PWM0 EB_ADDR4
R140 33 AA6
PWM_DIM PWM1 EB_ADDR5
AA5
PWM2 EB_ADDR6
R158 10K Y6
PWM_IN EB_ADDR7
EB_ADDR8
EB_ADDR9
L31
EMMC_CLK
EMMC_CLK EB_ADDR10
K32
EMMC_CMD
EMMC_CMD EB_ADDR11
EB_ADDR12
EMMC_DATA[7] G31
EMMC_DATA7 EB_ADDR13
EMMC_DATA[6] J32
EMMC_DATA6 EB_ADDR14
EMMC_DATA[5] J33
EMMC_DATA5 EB_ADDR15
EMMC_DATA[4] H33
EMMC_DATA4
EMMC_DATA[3] J31
EMMC_DATA3
EMMC_DATA[2] G32
EMMC_DATA2 EB_DATA0
EMMC_DATA[1] H31
EMMC_DATA1 EB_DATA1
EMMC_DATA[0]
H32
EMMC_DATA0 EB_DATA2
L32
EMMC_CAL EB_DATA3
OPT K31
EMMC_STRB EB_DATA4
L33
R188 33
EMMC_VCTRL EB_DATA5
DEBUG EMMC EB_DATA6
EB_DATA7
R142
10K
1%
L/DIM0_VS
TDI0
L/DIM0_MOSI
L/DIM0_SCLK
TCK0
SOC_RESET
FORCED_JTAG_0
M16 Symbol A
PAGE 1
USB2-0
V33
USB2_DP0
V32
USB2_DM0
V31 R143 200
1%
USB2-1
AM8
WIFI_DP
AN8
WIFI_DM
AN7 R144 200
1%
USB3-0
N32
USB3_DP0
P31
USB3_DM0
P32 C107 0.1uF
USB3_TXP0
P33 C108 0.1uF
USB3_TXM0
N31
USB3_RXP0
M32
USB3_RXM0
M33 R145 200
1%
USB2-2
T32
USB3_DP1
T31
USB3_DM1
U32
U33
R32
R33
R146 200
U31
1%
U30
/USB_OCD1
U29
USB_CTL1
G28
/USB_OCD2
H28
USB_CTL2
G29
/USB_OCD3
J28
USB_CTL3
D28
EB_WE_N
D29
EB_OE_N
H29
F28
EB_BE_N1
E28
EB_BE_N0
P29
CAM_CD1_N
P30
CAM_CD2_N
P28
/PCM_CE1
R30
/PCM_CE2
T29
CAM_IREQ_N
U28
PCM_RESET
T28
CAM_INPACK_N
R29
PCM_5V_CTL
R28
CAM_WAIT_N
N29
CAM_REG_N
A31 EB_ADDR[0]
B31 EB_ADDR[1]
A32 EB_ADDR[2]
B32 EB_ADDR[3]
B33 EB_ADDR[4]
EB_ADDR[5]
C31
C33 EB_ADDR[6]
EB_ADDR[7]
C32
E32 EB_ADDR[8]
EB_ADDR[9]
E33
F33 EB_ADDR[10]
EB_ADDR[11]
F31
D31 EB_ADDR[12]
D32 EB_ADDR[13]
E31 EB_ADDR[14]
F32
F16_CONNECT_DET
EB_DATA[0]
C30
A30 EB_DATA[1] EB_ADDR[0-14]
EB_DATA[2]
B30
C29 EB_DATA[3]
EB_DATA[4]
F29
F30 EB_DATA[5]
E30 EB_DATA[6]
E29 EB_DATA[7]
EB_DATA[0-7]
JTAG-0 I/F
6602T12004J
+3.3V_NORMAL
P102
12505WS-10A00
OPT
1
2
3
4
5
6
7
8
9
10
11
M16 2015.02.24
1 26
LGE Internal Use Only