Table of Contents
Advertisement
6-2.
BLOCK DIAGRAM – POWER SUPPLY Section –
LD1, LD2
LD1
(Page 13)
A
LD2
VCPU
Q409, 410
AUTOMATIC
INM1
POWER CONTROL
8
–
SWITCH
INP1
+
9
VCPU VOLTAGE
VCPU
MONITOR
Q417
RF1
Q410
7
BATT B+
Q411
DTC1
SWITCHING
11
VCPU
Q409
CMP1
SYSTEM CONTROLLER
10
IC801 (2/2)
RIPPLE
DC/DC CONVERTER
DTC3
VCPU
FILTER
MUTE SWITCH
6
Q451
Q452
DDCMUTE
2
VCC
RV401
VCC
INP2
ERROR
5
AMP
DPCON
3
VCPU
VCPU
20
REGULATOR
VREF
VREF
PCB
PCON 27
17
CHGON
CHGON 11
18
SYSTEM
CKOUT
15
CONTROL
SYNC
D806
16
RSTB
LOW VCPU
RESET 20
14
DETECT
CHGOUT
CHGMNT1 59
31
CHGMNT2 61
23 VG
DC IN
2
VCCMNT
5
VCC
DCDTB
DETECT
BATMNT 58
BATT B+
DCINMNT 57
CLK
B
(Page 13)
VG
(Page 13)
C
DCDTB
(Page 16)
D
05
– 17 –
AUTOMATIC POWER
SWITCHING
CONTROL
REGULATOR
Q408
Q406
POWER CONTROL
IC401
Q407
AUTOMATIC POWER
CONTROL SWITCH
UPCK1B
25
PWM
4
UPCK1
24
PWM
VOUT1
BATT B+
26
1
MOTOR/COIL DRIVER (IC504),
HEADPHONE AMP (IC302) B+
DC/DC
RECTIFIER
CONVERTER
Q405
T401
CHARGE
RECHARGEABLE
BATTERY
NH-DM2AA
OSC
2PCS. 2.4V
Q403
D407
PWM
VOUT2
29
2
Q453
DC/DC CONVERTER
DRY BATTERY
MUTE SWITCH
SIZE "AA"
(IEC DESIGNATION LR6)
CHARGE
RF3
2PCS. 3V
ERROR
35
SWITCH
AMP
Q402, 414
J401
DCIN
34
DC IN 4.5V
D415
–
+
CHARGE
RS
1
SWITCH
Q401
CHGSW
33
VCPU
BATM
32
CHARGE
VIN
AMP
30
SW
STEP UP
21
DC/DC
VDD
REGULATOR
22
CONVERTER
IC402
D411
D404
A/D
1
CHARGE
4
MONITOR
3
IC403
– 18 –
6-3. IC PIN FUNCTION DESCRIPTION
• MAIN BOARD IC801 MC68HC05L24-SC440488CFU (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
VDD
—
Power supply terminal (+3V)
2
DDCMUTE
O
DC/DC converter muting control signal output terminal
3
DPCON
O
DC/DC converter on/off selection signal output terminal
4
OE
O
Output enable signal output to the MPC17A51VMEL (IC504) "L" active
5
VCCMNT
I
Main DC/DC converter voltage (+2.75V) monitor input (A/D input)
6
MDL SL
I
Destination setting terminal Fixed at "L" in this set
Back light control signal output to the liquid crystal display on the switch unit
7
LIGHT
O
"H": back light on Not used (open)
8
C2PO FILTER
O
C2PO (error condition monitor) filter on/off control signal output terminal
9
DACLT
O
Serial data latch pulse signal output to the D/A converter (IC301)
C2PO (error condition monitor) signal control output terminal
10
C2POEN
O
"L": stop mode, "H": searching
11
CHGON
O
Charging on output to the MPC18A26VMEL (IC401) "L": charge on
12
RMDAT
I/O
Communication data in/out for the liquid crystal display with remote commander
13
VLCD3
O
14
VLCD2
O
Power supply output for the liquid crystal display bias
15
VLCD1
O
16
VSS
—
Ground terminal
17
VPP
—
Power supply terminal (0V)
18
TON
O
Traverse on/off control signal output to the auto traverse circuit
19
XOSC2
O
Standby control signal output to the headphone amplifier (IC302)
System reset signal input from the MPC18A26VMEL (IC401) "L": reset
20
RESET
I
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
21
OSC1
I
Main system clock input terminal (4.195 MHz)
22
OSC2
O
Main system clock output terminal (4.195 MHz)
23
SUBQ
I
Sub-code Q data signal input from the BU9325BKS (IC502)
24
CDATA
O
Serial data output to the D/A converter (IC301) and BU9325BKS (IC502)
Sub-code Q data reading clock signal output to the D/A converter (IC301) and BU9325BKS
25
SQCK
O
(IC502)
Data read/write selection signal output to the BU9325BKS (IC502)
26
RW
O
"L": reading mode, "H": writing mode
Power on/off control signal output to the MPC18A26VMEL (IC401)
27
PCON
O
"L": power on, "H": power off
28
AMUTE
O
Analog muting on/off control signal output terminal "H": muting on
AVLS (Automatic Volume Limiter System) switch (S301) input terminal
29
XAVLS
I
"L": limit mode, "H": normal mode
System reset signal output to the BU9325BKS (IC502) and D-RAM controller (IC601)
30
XRST
O
"L": reset
31
XHOLD
I
HOLD switch (S804) input terminal "L": hold on, "H": hold off
Rechargeable battery pack detection switch input terminal "L": rechargeable battery pack in
32
XRCHG
I
Not used (open)
Sled limit-in detection switch (S901) input terminal
33
XLMT
I
The optical pick-up is inner position when "L"
34
XRSM
I
RESUME switch (S803) input terminal "L": resume on, "H": resume off
CD door open/close detection switch (S801) input terminal
35
OPEN
I
The stop status is reset with the falling edge of input signal
– 19 –
Pin No.
Pin Name
I/O
Description
Wake-up control signal input terminal
36
WP
I
The stop status is reset with the falling edge of input signal
37
XLT
O
Serial data latch pulse signal output to the D-RAM controller (IC601) (for ESP)
38
XSOE
O
Serial data output enable signal output terminal (for ESP) Not used (pull up)
39
SDTO
I
Serial data input from the D-RAM controller (IC601) (for ESP)
40
SDTI
O
Serial data output to the D-RAM controller (IC601) (for ESP)
41
SCK
O
Serial data transfer clock signal output to the D-RAM controller (IC601) (for ESP)
42
FOK
I
Focus OK signal input from the RF amplifier (IC501) "L": NG, "H": OK
43
BUSY
I
Busy signal input from the BU9325BKS (IC502) "L": track jump mode, "H": servo loop on
44
BEEP
O
Beep sound output to the headphone amplifier (IC302)
45
SCOR
I
Sub-code sync (S0+S1) detection signal input from the BU9325BKS (IC502)
46
IRMC
I
Attenuate display selection signal input from the RF amplifier (IC501)
47
VDD
—
Power supply terminal (+3V)
48 to 51 COM3 to COM0
O
Common drive signal output to the liquid crystal display on the switch unit
52
VREFH
I
Reference voltage input terminal (+3V) (for A/D converter)
53
VREFL
I
Reference voltage input terminal (0V) (for A/D converter)
54
ESPSL/TEST
I
Service mode setting terminal "L": service mode, Normally: fixed at "H"
55
KEY
I
Key input from the switch unit (A/D input)
56
RMKEY
I
Key input from the headphone with remote commander (A/D input)
57
DCINMNT
I
DC in voltage detection input terminal (A/D input) Also used for DC IN detection
Battery voltage detection input terminal
58
BATMNT
I
Also used for rechargeable battery/dry battery detection
59
CHGMNT1
I
Battery charging voltage detection input from the MPC18A26VMEL (IC401)
60
VSS
—
Ground terminal
Battery voltage detection input terminal (A/D input)
61
CHGMNT2
I
Also used for rechargeable battery/dry battery detection
62
OSMNT
I
DSP offset voltage adjustment voltage monitor input from the BU9325BKS (IC502)
63 to 77
SEG0 to SEG14
O
Segment drive signal output to the liquid crystal display on the switch unit
78, 79
SEG15, SEG16
O
Segment drive signal output terminal Not used (open)
Error correction "L": quadruple correction, "H": double correction
80
X9326
I/O
Fixed at "H" in this set
– 20 –
D-E559CK
Advertisement
Table of Contents
