Bit Operation Mode Dp - Hyundai GMS800 Instruction Manual

Gms800 series 8-bit single-chip microcomputers
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HYUNDAI MicroElectonics

12-bit Address Space Memory Bit Operation
Operand composes the lower 8bit of 12bits address, the lower 4bits of operand indicate the upper 4bits of
12bits address, also bit position of memory is determined by upper 3 bits of operand 2, bit4 of operand
indicates reversal. The addressing memory space is 4k bytes in 000h~FFFh.
OP CODE
Operand
C,Memory
Memory
Example)
8B 35 51
1.9. 16 Bit Operation Mode
2nd byte of instruction(operand) is offset address in direct page, the contents of memory pair in its page is
determined to data. Direct page is selected by G-flag (G-flag is changeable by SETG, CLRG).
OP CODE
Operand
YA,Memory
Memory
Example)
1D 35
14
Lower Address Upper Address
AND1
AND1B
EOR1
NOT1
( C=1, (135h)=00
)
h
AND1B 135H.2

dp
dp
ADDW
CMPW
LDYA
DECW
INCW
( G=1 )
ADDW
35H

M.bit
Instructions
EOR1B
LDC
0135
0
0
0
0
0
0
h

C ← C
"1"
"0"
reverse
Operand 2
0
1
0
1
Instructions
STYA
SUBW
YA ← YA+
AA55
h
LDCB
OR1
OR1B
MEMORY
Data ( 00 )
0
0
Op code ( 8B )
Operand( 35 )
Operand( 51 )
1
h
MEMORY
000
h
0FF
h
100
h
Data1 ( 55 )
135
h
Data2 ( AA )
136
h
1FF
h
Op code ( 1D )
Operand ( 35 )
STC
135
h
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