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1. KLM-6019 circuit board CPU section (Circuit Diagram 1),
In the DDD-1, the pPD-78C10 1-chip microprocessor
is used to perform various types of control.
The CPU operates in accordance with a 12 MHz
ceramic oscillator. In addition, since the CPU is a
multiplex address/data bus, the lower 8 bits of the ad
dress are latched by IC3 (HC373).
Port A and port B are output ports. Most of the output
is output to circuit board KLM-6021 (panel).
IC5 (27C256) is a 32 K byte ROM (program ROM).
IC6 and IC7 (MB8464A) are 8K byte RAMs. The two
together have a total capacity of 16K bytes. The
RAMs are backed up by a lithium battery (BATT1)
during POWER OFF.
IKEY data input
IC4 (HC541) is used as a port for reading in key data,
mainly from circuit baord KLM-6021 (panel).
In output of MIDI OUT, CPU TxD (port PCO) MIDI out
signal is buffered by DT1 and DT2 (BAIA4M).
MIDI IN is isolated by photo coupler PC1 (PC900) and
input into RxD (port PC1) of the CPU.
The tap tempo is input to INT2 (port PC3) of the
The TRIG OUT signal is produced at port 6 of the
CPU. The polarity is switched by a dip switch
(SW1 or SW3); then it is output from the TRIG OUT
FOOT SW on/off signal is buffered by IC1 (HC
86) then entered into the key sw matrix by Q3 (2
The resultant of the signals at CPU ports PC4 and
PC7 passes through Q1 (2SC2785) and is output
from the circuit board KLM-6020 TAPE OUT jack.
The signal input from the jack (PH12) passes through
the KLM-6023 AUDIO IN potentiometer and then
enters the AUDIO IN circuit.
IN the AUDIO IN circuit it is first amplified by the first
stage IC23 (4558) and then fed to the sampling
board. Then it is half wave rectified by the second
stage IC23 (4558) and input as a dynamic value to the
CPU analogue port AN3.
The circuit board KLM-6023 PEAK LED is lit by the
comparator circuit formed by IC24 (2901).
After the signal passes through the TRIG detection
circuit formed by IC24 (2901), part of it is input to the
key matrix by transistor Q2 (2SA1175), and the re
mainder lights the circuit board KLM-6023 TRIG LED.
■Reset circuit
POWER ON or OFF is detected by the reset IC, IC37
(S-8054HN). A reset signal is formed, passes through
IC15 (HC14) and input to the CPU, GATE ARRAY,
RAM and sampling board.
I RAM card, sampling board, buffer and status
Since the RAM card and sampling board are con
nected directly by the CPU bus, a buffer is provided
for the connection for the sake of safety. IC14, IC8
and IC9 (HC4050) form the address bus buffer, while
IC25 (HC245) acts as a two-way buffer for the data
bus. In addition, the RAM card status signal (CARD
STAT) becomes LOW when the card is plugged in
and is input to CPU analogue port AN6. The sampl
ing board status signal becomes LOW when the
board is plugged in and is input to CPU analogue port
Addresses All to A15 are decoded by IC12 (HC138),
and the RAM, RAM card, GATE ARRAY, sampling
board and KEY input port (IC4) select signals are
2. Circuit board KUVI-6019, GATE ARRAY section (Circuit Diagram
The GATE ARRAY (IC22 MB661107) is connected
directly to the CPU bus, and controls the rhythm
sound source data in the voice ROM and ROM card
under CPU supervision.
I Sound source ROMs
The sound source ROMs are mask ROMs. Two, each
with 1M bit capacity, are used. They are connected to
the GATE ARRAY sound source address data bus,
and accessed by the GATE ARRAY. In addition, this
bus is connected to the circuit board KLM-6008 ROM
card, and accesses sound source data.
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