Ic Pin Function Description - Sony HCD-FL3 Service Manual

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8-42. IC PIN FUNCTION DESCRIPTION

• MC BOARD IC101 M30622MGN-A06FP (SYSTEM CONTROLLER)
Pin No.
Pin Name
1
AMP-DATA
2
AMP-CLK
3
AMP-LAT
4
SIRCS
5
DIG-TX
6
DSP-RX
7
DIG-CLK
8
GND
9
GND
10
XC-IN
11
XC-OUT
12
RESET
13
XOUT
14
VSS
15
XIN
16
VCC
17
NMI
18
RDS-INT
19
SCOR
20
DIR-INT
21
CAPM-H/L
22
CAPM-CNT1
23
A TRG
24
BU-PWM3
25
B TRG
26
BU-PWM2
27
A-HALF
28
BU-PWM1
29
IIC CLOCK
30
IIC DATA
31
CAN'T USE
32
SQ-DATA-IN
33
SQ-CLK
34
SENS
35
CD-DATA
36
CAN'T USE
37
CD-CLK
38
POWER LED
39
CLOCK-OUT
40
LDON(3STATE)
41
M-RESET
42
XLT
I/O
O
Serial data output to the M61520FP
O
Serial data transfer clock signal output to the M61520FP
O
Serial data latch pulse signal output to the M61520FP
I
Remote control signal input from the remote control receiver
O
Serial data output to the audio digital signal processor and digital audio interface receiver
I
Serial data input from the digital audio interface receiver
Serial data transfer clock signal output to the audio digital signal processor and
O
digital audio interface receiver
Ground terminal
Not used
I
Sub system clock input terminal (32.768 kHz)
O
Sub system clock output terminal (32.768 kHz)
System reset signal input from the reset signal generator " L " : reset
I
For several hundreds msec. after the power supply rises, " L " is input, then it changes to " H "
O
Main system clock output terminal (16 MHz)
Ground terminal
I
Main system clock input terminal (16 MHz)
Power supply terminal (+3.3V)
I
Non-maskable interrupt input terminal Fixed at " H " in this set
I
Serial data transfer clock signal input from the RDS decoder on the tuner unit
I
Subcode sync (S0+S1) detection signal input from the CXD2587Q
O
Interrupt request signal output to the digital audio interface receiver
High/normal speed selection signal output of the capstan motor
O
" L " : high speed, " H " : normal speed
O
Capstan motor drive signal output
O
Deck-A side trigger plunger drive signal output " H " : plunger on
O
RFDC PWM signal output to the RF amplifier
O
Deck-B side trigger plunger drive signal output " H " : plunger on
O
PWM signal output to the RF amplifier
I
Deck-A cassette detection signal input terminal " L " : no cassette, " H " : cassette in
O
Focus servo drive PWM signal output to the RF amplifier
O
IIC data reading clock signal output to the fuluorescent indicator driver
I/O
IIC two-way data bus with the fuluorescent indicator driver
I
Not used
I
Subcode Q data input from the digital signal processor
O
Subcode Q data reading clock signal output to the digital signal processor
I
Internal status detection monitor input from the digital signal processor
O
Serial data output to the digital signal processor
I
Not used
O
Serial data transfer clock signal output to the digital signal processor
O
LED drive signal output terminal
O
Clock (32.768 kHz) signal output terminal (for test mode) Not used
O
Laser diode on/off control signal output to the RF amplifier " L " : laser diode on
I
Reset signal output to the fluorescent indicator tube driver and led drive controller
O
Serial data latch pulse output to the digital signal processor
Description
HCD-FL3
75

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