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PW-A
transistors and CV/CC REF into positive or negative
voltage according to the CPU and stops the output.
Parts and voltage differ with the polarity of the output.
9.
CH1/2 signal selector 1 (IC13)
The reference value and monitored value of each
output are controlled by a shift register and are output.
Analog data output here is switched by a multiplexer
again and input to an ADC, which converts it into digital
data and sends it to the CPU unit.
10.
CH1/2 signal selector 2 (IC15)
This selector selects the output shown in 9, reference
Zener voltage or COM voltage, and sends it to the ADC.
11.
Shift register (IC18)
The shift register controls signals output through pins 9,
10 and 11 of the multiplexers shown in 9 and 10 above.
Operation of the shift register is controlled by the CPU
unit.
12.
CH1/2 A/D converter
The A/D converter converts the output voltage of the
signal selector shown in 10 into 20-bit digital signal.
13.
CH1/2 reference voltage (D5)
Zener diode produces the reference voltage.
24.
Power transistors (Q1 to 6) These are the main
power transistors for stabilizing the output power.
transistors are Darlington-connected.
characteristics of the power transistors differ with the
output specifications.
±12 V regulator (IC37 and IC38)
43.
regulates the voltage from the power unit to ±12 V.
02, 03 and 04 modifications: Power source of all analog
circuits of the amplifier unit
Power source of the analog circuits of CH1 and CH2
±12 V regulator (IC40 and IC41) This is used for
44.
01 and 05 only.
analog circuits.
Signals
A* S DATA0 A, B: Serial data of the CV REF voltage
S ...: Serial data of the CC REF voltage
LE...: Latch enable signal. Serial data is read in and
analog signal is output at the trailing edge of this signal.
CLK...: Clock pulses for running the D/A converter
B*: Reference voltage for CC control.
the CC setting is changed.
C*: Reference voltage for CV control.
the CV setting is changed.
D*: Signal for monitoring the current
E*: Output voltage, which is attenuated by the voltage
monitor in the latter stage.
F*: Clock pulses for running the A/D converter
CS...: Chip select signal.
the sleep condition when this is High.
G*: Digital output signal converted from each analog
data
H... Shift register data line common to the signal input
to the DAC.
The multiplexer is controlled based on
this signal.
CLK...: Clock pulses for the shift register
LE...: Shift register latch enable
CPU UNIT (X77-238)
The CPU unit has a digital control circuit composed of a
18
CIRCUIT DESCRIPTION
(CH3/4: IC31)
(CH3/4: IC33)
(IC17)
(CH3/4: IC35)
(CH3/4: D26)
The number and
The regulator
01 and 05 modifications:
This produces power source of CH3
Changes when
Changes when
The A/C converter enters
CPU, ROM, RAM and so forth, AC inlet, fuse, input
selector switch,
capacitors.
The digital control circuit reads signals of the rotary
encoder and switches from the display unit connected
with a flat cable and sends control data to the amplifier
unit.
The AC power supply unit feeds power input into the AC
inlet to the transformer through the power supply unit
E/6 with a power switch.
The amplifier unit supplies +5 V.
Digital control circuit
(A number is a number of a block diagram)
1.
CPU (IC1): Microcomputer IC.
12.2 MHz. Driven on +5 V. Executes various controls.
2.
Reset circuit (IC11): This circuit monitors +5 V
when power is turned on, changes the RESET signal
level from L into H, and activates the CPU.
A
gives a latch enable signal of the OUTPUT signal in
order to prevent output when the power source is
unstable.
The
3.
Line decoder (IC6) and data latch (IC7, 8, 9, and 10):
These convert the data line data into each data.
4.
EEPROM (IC4 and 5): An IC for storing the power
setting, adjustment values, etc.
5.
Isolation (PH1 to 29): Isolates the digital circuits
00,
from the analog circuits.
S-DATA -- Serial data of the set voltage and current.
Connected to the DAC of the amplifier unit.
reference signal is produced based on this data.
CLK-DA -- Clock pulses for the above serial data
LE-DA -- Latch enable signal for the above serial data.
Transferred to the converter synchronously with the
trailing edge.
CLK-CTR -- Clock pulses to the shift register of the
amplifier unit.
The S DATA shown above is used.
LE-CTR -- Latch enable signal to the shift register of
the amplifier unit.
ADC is selected according to the shift register.
DATA-AD -- Serial data from the ADC of the amplifier
unit.
This data is read and the output value is
displayed.
CS-AD -- Select signal to the ADC.
sleep condition when this signal is Low.
CLK-AD -- Clock pulses to the ADC.
using this clock pulse for external clock operation.
OUT -- OUTPUT ON/OFF signal to each channel.
CVCC -- This signal indicates the CV/CC operation
condition of each channel.
unit and read by the CPU, which reflects the signal
upon the display unit.
6.
Encoder signal (IC...): When the encoder is rotated
clockwise, pin 5 of IC12 outputs a High signal and pin 9
of IC12 outputs a Low signal.
rotated counterclockwise, pin 5 of IC12 outputs a Low
signal and pin 9 of IC12 outputs a High signal.
goes Low and an interrupt signal is input to the CPU
when either operation is carried out.
and clears this signal.
and AC power supply
Clock frequency:
Analog data to be supplied to the
The ADC is in the
Data is read
It is sent by the amplifier
When the encoder is
The CPU reads
unit
with
It also
The
IC14-2
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