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Schematic Diagrams
4-12 Sil169
1
2
3
+3.3V_ST2
DDC_5V
D1300
D1301
D1302
D1303
D1304
D1305
D1306
D1307
D1308
A
SDS7000
SDS7000
SDS7000
SDS7000
SDS7000
SDS7000
SDS7000
SDS7000
SDS7000
SDS7000
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
3
3
3
3
3
3
3
3
3
JA1300
tpcon32p_1
1
9
17
2
10
18
3
11
B
19
4
DDC_5V
12
20
5
13
21
6
14
22
7
15
23
8
16
24
25
26
27
For Sil151
28
C
29
+5V_ST
30
R1312
31
2K
32
C1315
R1316
100nF
10K
R1317
R1318
C1316
C1317
10K
10K
100nF
47uF
IC1301
D
NM24C02M8
R1329
100
DDC_SDA
5
4
R1332
100
6
3
DDC_SCL
7
2
8
1
DIGITAL EDID EPROM
E
+3.3V_ST2
R1334
4.7K
R1336
100
DDC_SDA
F
Q1300
2N7002L
R1337
100
DDC_SCL
Q1301
2N7002L
G
H
1
2
3
4-12
4
5
+3.3V_TMDS
D1309
L1300
1.5uH
1
C1300
10uF
16V
3
C1301
C1302
C1303
C1304
100pF
100pF
100pF
10nF
+3.3V_TMDS
R1300
10
RX2-
R1301
10
RX1-
R1302
10
L1301
RX0-
R1303
10
1.5uH
RX2+
R1304
10
RX1+
R1305
10
RX0+
C1309
C1310
10uF
100pF
10V
T
RX2+
RX2-
DDC_SCL
DDC_SDA
RX1+
DVI_DET
RXC+
RX1-
R1309
10
R1310
10
RXC-
RX0+
RX0-
+5V_ST
RXC+
D1312
RXC-
R1315
100
DDC_SCLT
DDC_5V
D1314
L1303
1.5uH
R1319
100
RESET_SNI
C1318
1nF
R1331
100
DDC_SDAT
TMDS_EN
(LOW : DISABLE)
(HIGH : ENABLE)
+3.3V_ST2
R1335
FT1310
4.7K
SGM32F1E104-2A
+3.3V
DDC_SDAT
DDC_SCLT
FT1309
SGM32F1E104-2A
4
5
6
7
8
OGND5
SUPLECODE
Q01
IN
RA1306
QO23
Q00
IN
OVCC5
HSYNC
IN
AGND
VSYNC
IN
RX2+
DE
IN
RX2-
OGND3
IN
AVCC
ODCK
IN
AGND1
OVCC3
IN
AVCC1
CTL3
IN
R1307
RX1+
OCK_INV
IN
R1308
RX1-
IN
HS_DJTR
IN
AGND2
GND1
IN
AVCC2
VCC1
IN
IC1300
AGND3
QE23
IN
SII169CT100
RX0+
QE22
IN
RX0-
QE21
IN
AGND4
QE20
IN
RXC+
QE19
IN
RXC-
QE18
IN
R1313
AVCC3
QE17
IN
390ohm
EXT_RES
QE16
IN
PVCC
OVCC2
IN
PGND
OGND2
IN
RESERVED
QE15
IN
SCL
QE14
IN
R1321
R1320
0
0
R1322
2
6
8
2
6
8
2
6
8
2
6
8
4
4
4
4
0
RA1300
RA1301
SUPLECODE
SUPLECODE
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
R1330
10K
R1333
0
+3.3V_TMDS
1
2
A
B
C
3
ESD
1 A
B 2
C
3
6
7
8
9
10
+3.3V_TMDS
L1302
C1305
C1306
C1307
1.5uH
10nF
100pF
100pF
C1308
10uF
16V
DVI_HSYNC
DVI_VSYNC
DVI_DE
DVI_CLK
0
0
C1311
C1312
C1313
C1314
15pF
15pF
22pF
15pF
RA1304
DVI_R(7)
DVI_R(6)
SUPLECODE
DVI_R(5)
DVI_R(4)
DVI_R(3)
DVI_R(2)
DVI_R(1)
DVI_R(0)
DVI_R(0:7)
RA1305
SUPLECODE
+3.3V_TMDS
L1304
1.5uH
C1319
10uF
RA1302
RA1303
16V
D1311
SUPLECODE
SUPLECODE
BZX84C5V1
C1320
C1321
C1322
C1323
C1324
10nF
100pF
100pF
100pF
100pF
DVI_G(0:7)
DVI_B(0:7)
ED
DATE
P_A0
PV
Jun 12th,2002
Jul 22th,2002
Model :
Alexander_PAL
D
E
N
W
SEC
SEC
Sheet Title :
G
G
13_D_ (Sil169)
REF.NO
SEC
9
10
11
12
A
B
C
D
E
F
G
H
CODE.NO
SHEET.NO
13/13
11
12
Samsung Electronics
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