D-Board (2 Of 2) Block Diagram - Panasonic TH-103PF9EK Service Manual

TH-103PF9UK / TH-103PF9EK

13.22. D-Board (2 of 2) Block Diagram

D DIGITAL SIGNAL PROCESSOR/FORMAT CONVERTER
!
PLASMA AI/SUB-FIELD PROCESSOR
<TZTNP02YLTJ>
(Exchange board only)
1
2
3
4
BUS SW
5
FLASH CONTROL
6
JTAG
7
DISCHARGE CONTROL
8
9
10
11
12
13
14
Control DATA(U)
15
Control DATA(D)
16
SS PULSE
17
SC PULSE
18
LEVEL CONVERTER
LEVEL CONVERTER
LEVEL CONVERTER
SOS9_C0NF
19
DRV_RST
20
IC9802,03
LEVEL CONVERTER
SOS6,7,8
21
TH-103PF9UK/EK
D-Board (2 of 2) Block Diagram
IC9400
PD1-M<RIGHT>
FORMAT CONVERTER/RGB PROCESSOR<R>
R 10bit
CTI/TINT
G 10bit I/P FORMAT COLOR
CONVERTER CONVERTER CONTRAST
B 10bit
WB-ADJ
st-r
SFRST
SFVRST
VD
VD LATCH
HD
HD
DCK
DCK JTAG
PCK OCK
P3V_SCL02
TD0,TD1,TMS,TCK
P3V_SDA02
60MHz
39.5MHz
20MHz
CLKM_IN
84MHz FREE_RUN
R10-R19,G10-G19,B10-B19
PCK OCK
JTAG
SFRST
SFVRST
LATCH
FORMAT CONVERTER/RGB PROCESSOR<L>
FPCLK
FPDAT0
FPDAT1
R 10bit
CTI/TINT
G 10bit I/P
FORMAT COLOR
CONTRAST
CONVERTER CONVERTER
B 10bit
WB-ADJ
st-r
VD
VD
HD
HD IIC
DCK
DCK
SCL SDA
P3V_SCL02
P3V_SDA02
IC9504 P5V
3.3V 5V
ODEU1,ODEU2,PCU1,PCU2,LEU1,LEU2,CLRU1,CLRU2
IC9505 P5V
3.3V 5V
ODED5,ODED6,PCD5,PCD6,LED5,LED6,CLRD5,CLRD6
IC9503
P5V
SOS7_DRV
3.3V 5V
Sustain Control DATA 6bit
UMH,UML,USH,USL,UEH,NUEL
Data power recovery DATA 8bit
DMHR,DSHR,DSLR,DMLR,DMHL,DSHL,DMLL,DSLL
CBK
P5V
CBK
3.3V 5V
Scan Control DATA 13bit
CL,CLK,SIU,SID,SCSU,CEL2,CPH,CEL,DVR_RST_0,CSL,CSH,CML,CMH
LED
SOS6_SC1
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<R>
R 10bit
NEW SUB-FIELD DATA
G 10bit
PLASMA AI PROCESSOR DRIVER
B 10bit
IIC
XRST
SCL SDA
XRST2
IC9304
IC9602
16M FLASH MEMORY
RESET
P3.3V
5 4
VCC VOUT RESET
14 CLK5 X9500
XT 1
XCE-L
7 CLK1
IC9200
XOE
13 CLK6 XWE
CLOCK GENE. BYTE
XTN 20
12 CLK7
IC9402
DA14,DA15-DC15<L>
BUS SW
BUS
UA05-UC12,UC13,UA15<L>
SWITCH
XRST
XRST XCE-L
IC9300
PD1-M<LEFT>
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<L>
R 10bit
SUB-FIELD DATA
NEW
G 10bit
PLASMA AI PROCESSOR DRIVER
B 10bit
Q9306
D20
TO SC20
2
9 SCAN
12 DATA
P5V
20
1 P5V
11 SOS6-SC1
52 38 28 6 36 34 61 60 59 58 56 55 54 32 30 4
D36
R-DOWN
TO C60
CABLE
<TSXL578>(D36-CD1)
<TSXL579>(CY0-CD2)
98
IC9401
DDR SDRAM<R>(128M)
DRVCLKU0-U3,DRVCLKD0-D3<R>
Video DATA 48bit UA00-UC11<U/R>
Video DATA 48bit DA00-DC11<D/R>
ROMDATA04-15 UA12-UC15<R>
ROMDATA00-03 DA14,DA15-DC15<R>
IC9603
BUS SWITCH
XCE-L
DA14,DA15-DC15<L>
DQ0-DQ3
UA12-UC15<L>
DQ4-DQ15
UA05-UC10,UB11,UC11<L>
A0-A19
CLKU3
CLKU2
UA12-UC12,UC13,UA15
UA05-UC11
IC9301
DDR SDRAM<L>(128M)
ROMDATA00-03 DA14,DA15-DC15<L>
ROMDATA04-15 UA12-UC15<L>
Video DATA 48bit UA00-UC15<U/L>
Video DATA 48bit DA00-DC15<D/L>
CLKU1
CLKU0
DRVCLKU0-U3,DRVCLKD0-D3<L>
CLKD0
CLKD1
3 2 64 56 38 28 2 36 34 32 30 61 60 59 58 64 62 68 66
D35
L/R-DOWN
TO C54
CABLE
TH-103PF9UK/EK
<TSXL576>(D35-CD1)
<TSXL577>(C90-CD2)
D-Board (2 of 2) Block Diagram
CABLE
<TSXL568>(D31-CD1)
<TSXL569>(C20-CD2)
R-UP
D31 TO C10
30bit UA06-UC15<R> 52
DOUTU31C
38
28
DOUTU22A
6
CLKU3
32 CLKU7(-)
CLKU2
30 CLKU6(+)
56 DMHR
55 DSHR
54 DMLR
36 DSLR
ODEU1
61 ODEU1(R)
LEU1
LEU1(R)
60
PCU1
59 PCU1(R)
CLRU1
58 CLRU1(R)
Q9300
64 5VDET
CABLE
<TSXL570>
(D32-CD1)
<TSXL571>
(C40-CD2)
L/R-UP
D32
TO C24
18bit UA00-UC05<R>
56 DOUTU21C
38 DOUTU16A
18bit UA10-UC15<L>
28 DOUTU15C
2 DOUTU10A
CLKU0
36 CLKU5(-)
CLKU1
34 CLKU4(+)
32 CLKU3(-)
30 CLKU2(+)
ODEU2
61 ODEU2(L)
LEU2
60 LEU2(L)
PCU2
59 PCU2(L)
CLRU2
58 CLRU2(L)
Q9301 64 5VDET
62 DRV_SOS7
P5V
68
TP9533 P5V
66
CABLE
<TSXL572>
(D33-CD1)
<TSXL571>
(C50-CD2)
L-UP
D33 TO C25
52
DOUTU9C
30bit UA00-UC09<L>
38
28
DOUTU0A
6
36 CLKU1(-)
34 CLKU0(+)
30 DSLL
4 DMHL
3 DSHL
2 DMLL
Q9302 64 5VDET
CABLE
<TSXL574>
(D34-CD1)
<TSXL575>
(C80-CD2)
L-DOWN
D34
TO C55
48
DOUTD0A
30bit DA00-DC09<L>
38
28
DOUTD9C
2
60
SUSTAIN
DATA
54
62 SOS8-SS
32 CLKD0(+)
30 CLKD1(-)
Q9303 64 5VDET