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D O C - 0 5 0 8 - 0 1 0 , R E V TWR-S12G128 Demonstration Board for Freescale MC9S12G128 Microcontroller USER GUIDE www.axman.com Web Site: support@axman.com Support:...
T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E CONTENTS CAUTIONARY NOTES ......................4 TERMINOLOGY ......................... 4 FEATURES ..........................
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T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E FIGURES Figure 1: Memory Map........................ 6 Figure 2: BDM_PORT Header ....................7 Figure 3: PWR_SEL Option Header ...................
1) Electrostatic Discharge (ESD) prevention measures should be used when handling this product. ESD damage is not a warranty repair item. 2) Axiom Manufacturing does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under patent rights or the rights of others.
U S E R G U I D E FEATURES The TWR-S12G128 is a demonstration board for the MC9S12G128 microcontroller; an automotive, 16-bit microcontroller focused on low-cost, high-performance in a low pin-count device. The MC9S12G128 provides16-bit wide accesses, without wait states, for all peripherals and memories.
T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E MEMORY MAP Figure 1 below shows the target device memory map. Refer to the MC9S12G Family Reference Manual (RM) for further information.
T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E DEVELOPMENT SUPPORT Application development and debug for the target TWR-S12 board is supported through the Open-Source Background Debug Mode (OSBDM) interface or an external BDM interface connector.
T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E NOTE: This header is not installed in default configuration. POWER The TWR-S12 board may be powered from the OSBDM, from the Tower System, from the LIN +V input, or 2 input vias at E1 &...
MC9S12G Family Reference manual for details of POR, LVR, and LVD operation. TIMING The TWR-S12G128 internal timing source is active from RESET by default. An external 8MHz crystal oscillator, configured for low-power operation, is also installed. Refer to the target device RM for details on selecting and configuring the desired timing source.
A 2x5, 0.1”, standard “Berg” pin-header provides external connections for the SCI port. Figure 5 below shows the COM1 pin-out. The TWR-S12G128 ships with a DB-9 to 2x5 IDC connector cable to interface the target board to standard serial cables.
G U I D E LIN Port The TWR-S12G128 applies the MC33661 LIN bus physical layer device (transceiver) to support LIN communications. The PHY may be configured as a Master or Slave node on the LIN bus. LIN connectors J9 & J10 are configured in parallel to support pass-thru signaling.
NOTE: LIN PHY may also be configured as a Master Node using the INH pin. Refer to the LIN PHY data sheet for details. LIN-J1 Connector The TWR-S12G128 supports two, 2 x 2 Molex connectors to interface to the LIN bus. Figure 9 below details the pin-out of the LIN bus connector. Figure 9: LIN Connector...
T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E CAN Port One, TJA1040T, High-Speed CAN physical-layer transceiver (PHY) is applied to support CAN bus communications.
User LED’s The TWR-S12G128 target board applies 4, green, LEDs for output indication. Each LED is configured for active-low operation. A series, current-limit resistor prevents excessive diode current. Each LED is connected to a timer channel on the target MCU. Figure 12 below shows the USER jumper settings.
T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E EDGE CONNECTOR PINOUT The TWR-S12 board connects to the Freescale Tower System using the 2 PCIe Edge Connectors.
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T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E 3.3V Power Pri_B36 Pri_A36 3.3V Power Pri_B37 Pri_A37 PWM7/KWP7/PP7 PWM3/ETRIG3/KWP3/PP3 Pri_B38...
T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E Figure 14: Secondary Edge Connector 5.0V Power Sec_B01 Sec_A01 5.0V Power Ground...
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T W R - 9 S 1 2 G 1 2 8 J A N U A R Y 2 0 1 1 U S E R G U I D E Sec_B46 Sec_A46 Sec_B47 Sec_A47 Sec_B48 Sec_A48 Ground Sec_B49 Sec_A49 Ground Sec_B50...
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