Philips MX3900D Service Manual page 61

M5705 (Ali) Features
Data Separator
Built-in data slicer and data PLL for data
recovery from RF signal.
Supports digital/analog slice level
adjustment.
Built-in auto calibration function.
Built-in auto wire range control function.
DVD-DSP
Built-in synchronous pattern/ID detection
/protection/separation.
Built-in EFM+ (8 to 16) demodulation
circuit.
Built-in high performance RSPC ECC
circuit.
Supports up to 6X DVD-ROM system with
ECC correcting "on the fly".
Built-in descrambler/EDC circuit.
CD-DSP
Synchronous pattern detection, protection
and interpolation.
Built-in EFM demodulation circuit,
subcode demodulation circuit.
Dual C1 correction and quadrule C2
correction.
Subcode Q data can output with audio
data synchronously.
Digital Servo
Built-in A/D and D/A converters for servo
control signals processing.
Built-in digital controller for focus,
tracking servo control of CD/DVD systems.
Built-in CLV/CAV auxiliary function for
spindle servo control.
Built-in "Seek Sensor" auxiliary circuit for
seek control.
Automatic adjustment of focus servo and
tracking servo, for loop gain, offset and
balance.
Built-in RF gain automatic adjustment
function.
Built-in AFC circuit and APC circuit for CLV
and AFC circuit for CAV spindle servo of
CD/DVD systems.
Built-in defect and shock protection
function.
DRAM Interface
Supports up to 16 Mb EDO DRAM and
SDRAM.
Separate buffer address pointers and
automatic address calculation that save
firmware effort.
Read-ahead cache scheme for multimedia
isochronous transfer.
Protection logic preventing uncorrected
sectors being released to the host.
11-2
Target Search
Built-in target sector searching circuit
for auto-searching the target sector.
Automatic data buffering after the
target sector has been located.
C3 ECC/EDC
Programmable Reed-Solomon Product
Code (RSPC) that allows different error
correction schemes for CD-ROM.
Built-in On-chip EDC function.
Support up to 32X CD-ROM system with
ECC correcting "on the fly".
Host Interface
Supports ATA PIO mode 4 timing
Supports Multiword DMA mode 2 timing
Compliant with SFF-8020(ATAPI) 2.5,
ATA 3(Overlapping feature), and
SFF-8090 (ATAPI for DVD) standard
High current drivers with slew rate
control for direct connecting to the ATA
bus and noise immunity.
Automatic Read Control Circuit for host
data transfer.
Automatic wake up from power down on
host reset or command write
Automatic sequence for packet command
receiving and Automatic updating of the
host task file registers
Supports ATAPI write command that can
let user update firmware from PC.
Built-in authentication circuit for copy
protection.
Multiplexed MPEG decoder interface
(local bus).
Microcontroller Interface
Embedded microcontroller compatible
with Intel 8032 command set
Supports Intel 8032 series MCUs
Supports Intel 8032 series MCUs and
Hitachi H8 series MCUs.
Supports automatically download
firmware function directly from ATAPI
interface to flash memory
Supports "on-system" upgrade flash
memory function from CD-R discs or ATAPI
interface
High speed register (buffer RAM) access to
meet the requirement of high
performance system
Supports Direct mapped access to the
buffer RAM using ready bit handshaking
M5705 (Ali) Application
M5703/M5707 M5705
RF
Amp
Data
M
Separator
Digital
Motor
Servo
Driver
11-2
4M DRAM
ATAPI
&
MPEG
RAM
DVD-DSP I/F
Arbiter
C3 ECC
EDC
CD-DSP
Target MCU
Search
ROM
PC
MPEG
DEC.