Sony TRINITRON HMD-A420 Service Manual page 33

1 3
2
D-f
(USB CONTROL)
A
P7000
4P
R7000
L7001Ł
NC 1
18
0.45µH
USB DM
2
L7002
USB DP 3
0.45µH
GND 4
L7003
TO D-a BOARD R7001
1µH
CN904 18
L7004
JW
B
5VF
C
IC7001
MIC2526
POWER SWITCH
5VF
8 OUTA ENA 1
7 IN FLGA 2
6 GND FLGB 3
D
5 OUTB ENB 4
5VF
5VF
8 OUTA ENA 1
7 IN FLGA 2
E
6 GND FLGB 3
5 OUTB ENB 4
IC7002
MIC2526
POWER SWITCH
F
G
• Divided circuit diagram
One sheet of D board circuit diagram is divided into six
sheets, each having the code D-a to D- f. For example, the
destination ab1 on the D-a sheet is connected to ab1 on the
H
D-b sheet.
a b 1
Ref. No.
Circuit diagram division code
I
4 5 6
3.3V
R7002
1.5k
L7005Ł
JW
L7006
JW
IC7000
ISP1122
3.3V
USB CONT
L7007
2.3µH
1 V3.3 PSW1 32
2 PSW2 DP2 31
L7008
5VF
2.3µH
3 GND DM2 30
L7009
1µH
4 DM3 DP0 29
+
L7010
1µH
5 DP3 DM0 28
L7011
6 VCC DP1 27
C7000Ł
+
220Ł
R7011Ł
10V
1k
7 OC1_N DM1 26
R7012Ł
1k
8 OC2_N DP5 25
R7019
1M
R7013Ł
1k
9 OC3_N DM5 24
5VF R7020
1M
R7014Ł
1k
R7022
10 OC4_N INDV/SCL 23
11 OC5_N OPTION/SDA 22
12 DM4 RESET_N 21
L7012
L7013
13 DP4 XTAL2 20
5VF L7014
D7000
2.3µH HZ5.1B
14 SP/BP_N XTAL1 19
15 HUBGL_N PSW5 18
R7018
1M
16 PSW3 PSW4 17
R7017
15k
5-25
7 8 9
P8D1
P7D1
7P 7P
1 1
V2 V2
2 2
V1 V1
3 3
P2 P2
4 M2 M2 4
5 P1 P1 5
6 M1 M1 6
7 DGND DGND 7
R7016
15k
L7015
1µH
L7016
1µH
L7017
P8D2
P7D2
7P
7P
1 1
L7018 P3 P3
2 M3 M3 2
5VF 3 DGND DGND 3
4 V4 V4 4
5 V3 V3 5
6 M4 M4 6
7 P4 P4 7
5VF
3.3k
R7024
0
C7006 22p
X7000
6MHz
C7007 22p
5VF
R7025
100k
+
R7026
3.3k
10
11 12
13
L7020
2.3µH
L7019
2.3µH
C7016
+ C7015
0.1
330
50V
C7013 10V
+
330 C7014
10V
0.1 P7001
50V
1
R7028 24
2
R7029 24
3
4
L7034
2.3µH
L7021 JW
P7002
L7022 JW
1
R7030 24
L7023 JW
2
L7024 JW
3
R7031 24
4
L7025 2.3µH
USB DB_A BLOCK
L7026
JW
L7028 2.3µH
+ C7021 C7022
L7027
330 0.1
JW
10V 50V
L7029
P7003
2.3µH
1
R7032 24 1/4W
2
+
R7033 24 1/4W
3
4
L7030 2.3µH
P7004
1
L7031
R7034 24
JW
2
L7032
JW
3
L7033 R7035 24
2.3µH
4
USB DB_B BLOCK
B-SS3545<AEP>-D..-P6-EPS05
5-26
14